Method for forming interconnect structure in semiconductor device
OwnerAkira Matsumotoinventor
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OwnerAkira Matsumotoinventor
Estimating the term…
A method of fabricating a semiconductor device including the steps of: forming a first trench and a second trench having a width larger than a width of the first trench in a dielectric film, and simultaneously a slit pattern at a central portion of the second trench; depositing a conductive layer on the dielectric film; and polishing the conductive layer until a surface of the dielectric film is exposed to leave the conductive layer in the first and the second trenches and the slit pattern, thereby forming a damascene interconnect structure on the surface of the dielectric layer. In accordance with the present invention, the formation of the slit pattern formed on the central portion of the larger width trench can increase the thickness of the plated film, thereby suppressing the dishing of the plated film on the central portion of the larger width interconnect.
A method for fabricating a semiconductor device comprising the steps of:
A method of fabricating a semiconductor device comprising the steps of:
A method of fabricating a semiconductor device comprising the steps of:
Dependencies are inferred from the claim text.