Field-effect transistor and manufacture thereof

A method for manufacturing a double-gate field-effect transistor comprising the steps of:

• forming a semiconductor layer on a first support substrate through the intermediary of an embedded insulating layer;
• forming an adjustment hole that penetrates said embedded insulating layer and said semiconductor layer in a depressed manner on said first support substrate;
• providing an insulating layer on said semiconductor layer additionally and forming a first gate at a predetermined position set apart from said adjustment hole on the insulating layer;
• forming the insulator on said insulating layer and further gluing a second support substrate on said insulator;
• removing said first support substrate and forming a second gate at a predetermined position set apart from said adjustment hole on said embedded insulating layer;
• and
• forming a source and a drain on the side of said embedded insulating layer and forming wiring of electrodes that connect to said source, said drain, said first gate, and said second gate, respectively.