Manufacturing method for LDMOS integrated device

A manufacturing method for a lateral double-diffused metal oxide semiconductor (LDMOS) integrated device, comprising:

• providing a semiconductor substrate having an N-channel LDMOS (NLDMOS) area and a P-channel LDMOS (PLDMOS) area, a P-type body area and an N-type drift area being formed in the NLDMOS area, an N-type source area being formed at top of the P-type body area, an N-type drain area being formed at top of the N-type drift area, and the NLDMOS area being formed with a first gate structure, an N-type body area and a P-type drift area being formed in the PLDMOS area, a P-type source area being formed at top of the N-type body area, a P-type drain area being formed at top of the P-type drift area, and a second gate structure being formed on the PLDMOS area;
• forming a dielectric layer on the NLDMOS area and a dielectric layer on the PLDMOS area on the semiconductor substrate, and forming a stress material layer on the dielectric layer on the NLDMOS area and/or on the dielectric layer on the PLDMOS area, a thickness of the dielectric layer on the NLDMOS area being greater than a thickness of the dielectric layer on the PLDMOS area;
• performing a heat treatment to adjust a stress of the stress material layer and increase electron mobility of the device;
• removing the stress material layer;
• and
• forming a suspension-type conductive plug above the P-type drift area and/or the N-type drift area, a bottom of the suspension-type conductive plug resting above the P-type drift area and/or the N-type drift area and being spaced a predetermined distance from an upper surface of the P-type drift area and/or the N-type drift area.