Trench power device integrated with inductor and manufacturing method therefor

A manufacturing method for trench power device integrated with inductor, comprising:

• a step A:
• forming a cell structure and an integrated inductor;
• a step B:
• defining contact holes;
• a step C:
• forming a circuit link layer;
• and
• a step D:
• forming a passivation layer;
• wherein the step A specifically comprises:
• a step S1:
• growing an epitaxial layer on a silicon substrate;
• a step S2:
• depositing a silicon dioxide thin film on the epitaxial layer as a hard mask for trench etching;
• a step S3:
• coating a photoresist on the hard mask, and defining trench patterns using a mask on the hard mask and the photoresist to form three types of trenches;
• a step S4:
• forming a circuit pattern on the hard mask and transferring the circuit pattern onto the silicon substrate, and removing the photoresist and the hard mask;
• a step S5:
• growing a sacrificial oxide layer on side walls of the trenches;
• a step S6:
• removing the sacrificial oxide layer, and growing a gate oxide layer;
• a step S7:
• depositing a polycrystalline silicon layer on surfaces of the trenches and the silicon substrate;
• a step S8:
• removing polycrystalline silicon outside the trenches;
• a step S9:
• growing a silicon dioxide/nitride silicon/silicon dioxide composite thin film on the surface of the silicon substrate;
• a step S10:
• depositing an intrinsic polycrystalline silicon layer on a surface of the silicon dioxide/nitride silicon/silicon dioxide composite thin film;
• a step S11:
• defining an electrostatic discharge protection diode (ESD) region in a photolithography process;
• a step S12:
• transferring a circuit pattern in the ESD region onto the silicon substrate, and removing unnecessary portions of the silicon dioxide/nitride silicon/silicon dioxide composite thin film and a second photoresist;
• a step S13:
• forming a transistor body region, and activating doped elements in the transistor body region;
• a step S14:
• defining a transistor cell source region, an ESD diode region, and an interconnection gate region simultaneously, and doping the transistor cell source region, the ESD diode region, and the interconnection gate region with doped elements, removing a third photoresist and activating the doped elements, and ultimately obtaining the cell structure and the integrated inductor.