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US 12,764,922 B2Granted
Semiconductor structure
AssigneePowerchip Semiconductor Manufacturing Corporation
InventorsJih-Chao Chiu, Yu-Shan Wu, Yuan-Ming Liu, Chee-Wee Liu
Life of this patent
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Abstract
A semiconductor structure including a substrate, gate layers, channel layers, and gate dielectric layers is provided. The gate layers and the channel layers are stacked on the substrate. The gate layers are separated from each other. Each of the gate layers surrounds the corresponding channel layer. Two adjacent gate layers are located between two adjacent channel layers. The gate dielectric layers are located between the gate layers and the channel layers.
Claims16
A semiconductor structure, comprising:
- a substrate;
- gate layers and channel layers stacked on the substrate, wherein the gate layers are separated from each other, each of the gate layers surrounds the corresponding channel layer, and two adjacent gate layers are located between two adjacent channel layers;
- gate dielectric layers located between the gate layers and the channel layers;
- and
- transistor devices, wherein the transistor devices comprise the gate layers, the channel layers, and the gate dielectrics layer, wherein
- a portion of the lowermost gate layer is located between the substrate and the lowermost channel layer,
- a portion of the lowermost gate dielectric layer is located between the substrate and the lowermost channel layer, and
- at least two of the transistor devices are connected in parallel.
5 more elements
Dependencies are inferred from the claim text.