Metal-insulator-metal capacitor structure

A metal-insulator-metal (MIM) capacitor structure, comprising:

• a semiconductor substrate having a capacitor forming region thereon;
• a first trench having a first depth, disposed in the semiconductor substrate within the capacitor forming region;
• a second trench having a second depth, disposed in the semiconductor substrate within the capacitor forming region, wherein the second trench is in proximity to the first trench, and wherein the second depth is greater than the first depth;
• a dielectric liner layer conformally covering a top surface of the semiconductor substrate, an interior surface of the first trench and an interior surface of the second trench;
• a first electrode layer conformally covering the dielectric liner layer, wherein the first electrode layer extends onto the top surface of the semiconductor substrate;
• a first capacitor dielectric layer disposed on the first electrode layer;
• a second electrode layer disposed on the first capacitor dielectric layer;
• a second capacitor dielectric layer disposed on the second electrode layer;
• and
• a third electrode layer disposed on the second capacitor dielectric layer, wherein a top surface of the second electrode layer is coplanar with a top surface of the first electrode layer.