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US 12,604,623 B2Granted
Display panel and display device
AssigneesChengdu Boe Optoelectronics Technology Co., Ltd., Boe Technology Group Co., Ltd.
InventorsRong Wang, Fan He, Hongwei Ma, Xiangdan Dong, Cong Fan, Zhenhua Zhang
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Abstract
The present disclosure provides a display panel and a display device. First interconnect lines of the display panel are connected to second data lines corresponding to first sub-pixels and third sub-pixels, and second interconnect sections of all the first interconnect lines are arranged in the same layer as a first source-drain metal layer or a second source-drain metal layer.
Claims19
A display panel, comprising a display area and a peripheral area at least partially surrounding the display area, wherein along a first direction, the display area of the display panel comprises a first display area and second display areas on both sides of the first display area;
- wherein the display panel comprises:
- a base substrate;
- a driving circuit layer comprising a first source-drain metal layer and a second source-drain metal layer, wherein the first source-drain metal layer is arranged on a side of the base substrate, and the second source-drain metal layer is arranged on a side of the first source-drain metal layer away from the base substrate;
- a pixel layer comprising a plurality of pixel groups, wherein the pixel groups comprise first sub-pixels, second sub-pixels and third sub-pixels with different colors;
- a plurality of pads located in the peripheral area;
- a plurality of data lines respectively electrically connected to a plurality of the first sub-pixels, a plurality of the second sub-pixels and a plurality of the third sub-pixels, wherein the plurality of data lines are located in the display area and extend along a second direction, the plurality of data lines comprise a plurality of first data lines located in the first display area and a plurality of second data lines located in the second display areas, and the plurality of first data line are electrically connected to the plurality of pads;
- and
- a plurality of interconnect lines located in the display area and electrically connected to the plurality of second data lines and the plurality of pads, wherein the plurality of interconnect lines comprises a plurality of first interconnect lines and a plurality of second interconnect lines, the first interconnect lines are connected to second data lines corresponding to the first sub-pixels and the third sub-pixels, and the second interconnect lines are connected to second data lines corresponding to the second sub-pixels;
- wherein each of the plurality of interconnect lines comprises a first interconnect section extending along the first direction and a second interconnect section extending along a second direction and the first direction and the second direction intersect;
- wherein at least one second interconnect section is arranged between two adjacent first data lines, second interconnect sections of all the first interconnect lines are arranged in a same layer as the first source-drain metal layer or the second source-drain metal layer, and at least a part of second interconnect sections of the second interconnect lines are arranged in a same layer as the first source-drain layer or the second source-drain layer;
- wherein the driving circuit layer further comprises driving circuit islands distributed in an array, and each of the plurality of interconnect lines is arranged in a gap between the driving circuit islands.
8 more elements
A display device, comprising:
- a display panel;
- wherein the display panel comprises a display area and a peripheral area at least partially surrounding the display area, and along a first direction, the display area of the display panel comprises a first display area and second display areas on both sides of the first display area;
- wherein the display panel comprises:
- a base substrate;
- a driving circuit layer comprising a first source-drain metal layer and a second source-drain metal layer, wherein the first source-drain metal layer is arranged on a side of the base substrate, and the second source-drain metal layer is arranged on a side of the first source-drain metal layer away from the base substrate;
- a pixel layer comprising a plurality of pixel groups, wherein the pixel groups comprise first sub-pixels, second sub-pixels and third sub-pixels with different colors;
- a plurality of pads located in the peripheral area,
- a plurality of data lines respectively electrically connected to a plurality of the first sub-pixels, a plurality of the second sub-pixels and a plurality of the third sub-pixels, wherein the plurality of data lines are located in the display area and extend along a second direction, the plurality of data lines comprise a plurality of first data limes located in the first display area and a plurality of second data lines located in the second display areas, and the plurality of first data line are electrically connected to the plurality of pads;
- and
- a plurality of interconnect lines located in the display area and electrically connected to the plurality of second data lines and the plurality of pads, wherein the plurality of interconnect lines comprises a plurality of first interconnect lines and a plurality of second interconnect lines, the first interconnect lines are connected to second data lines corresponding to the first sub-pixels and the third sub-pixels, and the second interconnect lines are connected to second data lines corresponding to the second sub-pixels;
- wherein each of the plurality of interconnect lines comprises a first interconnect section extending along the first direction and a second interconnect section extending along a second direction and the first direction and the second direction intersect;
- wherein at least one second interconnect section is arranged between two adjacent first data lines, second interconnect sections of all the first interconnect lines are arranged in a same layer as the first source-drain metal layer or the second source-drain metal layer, and at least a part of second interconnect sections of the second interconnect lines are arranged in a same layer as the first source-drain layer or the second source-drain layer;
- wherein the driving circuit layer further comprises driving circuit islands distributed in an array, and each of the plurality of interconnect lines is arranged in a gap between the driving circuit islands.
10 more elements
Dependencies are inferred from the claim text.