Semiconductor structure and preparation method thereof
AssigneeChangxin Memory Technologies, Inc.
InventorsYexiao Yu, Junyi Zhang
Life of this patent
Estimating the term…
Loading patent…
AssigneeChangxin Memory Technologies, Inc.
InventorsYexiao Yu, Junyi Zhang
Estimating the term…
The present application provides a semiconductor structure and a preparation method thereof, including: a substrate; a trench; a bit line contact structure; a bit line structure; a bit line protection structure, the bit line protection structure including a top dielectric layer and a sidewall structure, the top dielectric layer is located on the bit line structure and forms a laminated structure together with the bit line structure; the sidewall structure covers part of sidewalls of the laminated structure on the substrate, the sidewall structure has a first air gap; an isolation pattern structure, the isolation pattern structure has a second air gap, the isolation pattern structure extends along a second direction, the second direction intersects with the first direction, to form capacitance contact hole between the adjacent bit line protection structures and the adjacent isolation pattern structures.
A semiconductor structure, comprising:
A method for manufacturing a semiconductor structure, comprising:
Dependencies are inferred from the claim text.