Multi-bit structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShao-Lun Chien, Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShao-Lun Chien, Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien
Estimating the term…
An integrated circuit disclosed here includes several cell rows extending in a first direction and a multi-bit cell having several bit cells included in the cell rows. The bit cells include M bit cells, and an output signal of a N-th bit cell of the M bit cells is an input signal of a (N+1)-th bit cell of the M bit cells, N and M being positive integers. A first bit cell of the bit cells and a M-th bit cell of the bit cells are arranged diagonally in different cell rows in the multi-bit cell, and the N-th bit cell and the (N+1)-th bit cell are arranged diagonally in different cell rows in the multi-bit cell.
An integrated circuit, comprising:
An integrated circuit, comprising:
A method, comprising:
Dependencies are inferred from the claim text.