Dual-port SRAM cell structure

A dual-port SRAM cell, comprising:

• a first pass gate transistor and a second pass gate transistor over a substrate,
• wherein the first pass gate transistor includes a portion of a first gate electrode engaging a portion of a first active region, the second pass gate transistor includes a portion of a second gate electrode engaging a portion of a second active region, the first and the second gate electrodes are connected to different word lines of the dual-port SRAM cell, wherein the first and the second active regions are oriented lengthwise generally along a first direction, the first and the second gate electrodes are oriented lengthwise generally along a second direction perpendicular to the first direction;
• a first gate contact disposed over the first gate electrode;
• a first source/drain contact oriented lengthwise generally along the second direction, the first source/drain contact disposed over both a source/drain feature of the first pass gate transistor and a source/drain feature of the second pass gate transistor, wherein the first source/drain contact is disposed at a vertical level that is same as or below a top surface of the first gate contact;
• and
• a first metal line and a second metal line oriented lengthwise generally along the first direction, wherein the first metal line is directly above and connected to the first gate contact, and the second metal line is directly above the second active region and is wider than the second active region.

A layout of a dual-port SRAM cell, comprising:

• first, second, third, and fourth active regions over a p-type well, wherein each of the first, the second, the third, and the fourth active regions is oriented lengthwise generally along a first direction;
• a first gate electrode over the first and the second active regions;
• a second gate electrode over the third and the fourth active regions;
• a third gate electrode over the first, the second, the third, and the fourth active regions, wherein each of the first, the second, and the third gate electrodes is oriented lengthwise generally along a second direction perpendicular to the first direction;
• and
• a source/drain contact feature disposed between the first gate electrode and the third gate electrode and between the second gate electrode and the third gate electrode from a top view, wherein the source/drain contact feature contacts a first source/drain feature on the first active region, a second source/drain feature on the second active region, a third source/drain feature on the third active region, and a fourth source/drain feature on the fourth active region.