High resistivity semiconductor-on-insulator wafer and a method of manufacturing

A method of preparing a multilayer structure, the method comprising:

• forming a semiconductor layer to be in interfacial contact with a front surface of a single crystal semiconductor handle substrate, the single crystal semiconductor handle substrate comprising two major, generally parallel surfaces, one of which is the front surface of the single crystal semiconductor handle substrate and the other of which is a back surface of the single crystal semiconductor handle substrate, a circumferential edge joining the front and back surfaces of the single crystal semiconductor handle substrate, a central plane between the front surface and the back surface of the single crystal semiconductor handle substrate, and a bulk region between the front and back surfaces of the single crystal semiconductor handle substrate, wherein the single crystal semiconductor handle substrate has a minimum bulk region resistivity of at least about 3000 ohm-cm, and further wherein the semiconductor layer comprises germanium in a molar percent of germanium of at least 20 molar %;
• annealing the single crystal semiconductor handle substrate having the semiconductor layer in interfacial contact with the front surface of the single crystal semiconductor handle substrate for a temperature and a duration sufficient to at least partially relax the semiconductor layer, thereby forming a relaxed semiconductor layer;
• forming a charge trapping layer comprising a polycrystalline silicon layer in interfacial contact with the relaxed semiconductor layer, wherein the charge trapping layer has a resistivity of at least about 1000 ohm-cm;
• and
• bonding a dielectric layer on a front surface of a single crystal semiconductor donor substrate to the polycrystalline silicon layer of the single crystal semiconductor handle substrate to thereby form a bonded structure, wherein the single crystal semiconductor donor substrate comprises two major, generally parallel surfaces, one of which is the front surface of the semiconductor donor substrate and the other of which is a back surface of the semiconductor donor substrate, a circumferential edge joining the front and back surfaces of the semiconductor donor substrate, and a central plane between the front and back surfaces of the semiconductor donor substrate, and further wherein the front surface of the semiconductor donor substrate comprises the dielectric layer.