Mask ROM and process for fabricating the same

A Mask ROM, comprising:

• a plurality of first resistors as a first part of memory cells, each of which includes:
• an undoped first poly-Si layer including:
• an upper horizontal bar, a step structure with a step height, and a lower horizontal bar that is contiguous with the upper horizontal bar at the step structure and has a top surface being lower than a top surface of the upper horizontal bar by the step height and at same height as a bottom surface of the upper horizontal bar, wherein the step structure belongs to a portion of both the upper horizontal bar and the lower horizontal bar,
• a first spacer directly contacting on a sidewall of the upper horizontal bar and a portion of the top surface of the lower horizontal bar, and a second spacer on a sidewall of the lower horizontal bar, and
• a first silicide layer on the upper horizontal bar and the lower horizontal bar of the undoped first poly-Si layer, wherein the first silicide layer is divided apart by the first spacer to be non-contiguous, and a height of the upper horizontal bar is smaller than the step height by a thickness of the first silicide layer;
• a plurality of second resistors as a second part of the memory cells, each of which includes an undoped second poly-Si layer and a contiguous second silicide layer on the undoped second poly-Si layer;
• and
• a plurality of contact plugs, disposed on the first silicide layer on the upper horizontal bar of each undoped first poly-Si layer, and on the second silicide layer.