Substrate-level assembly for an integrated device, manufacturing process thereof and related integrated device

An electronic device, comprising:

• a substrate-level an assembly that includes:
• a device substrate of semiconductor material, having a top face and housing a including first integrated device provided with an active area adjacent to the top face and second sensor regions;
• a capping substrate cap coupled to the device substrate above the top face so as to cover the first integrated device and second sensor regions in such a manner that a first empty space cavity is provided in a position corresponding to the active area above the first sensor region and a second cavity is provided above the second sensor region, the first cavity being separate from the second cavity;
• and
• electrical-contact elements for electrical connection of to the first integrated device and second sensor regions extending outside of the substrate-level assembly first and second cavities;
• and
• a package encasing and mechanically protecting the substrate-level assembly;
• wherein the package comprises that includes:
• a base body mechanically supporting the substrate-level assembly, and
• a an insulative coating region configured to coat laterally material that is located on lateral sides of the substrate-level assembly.

A process for manufacturing a substrate-level an assembly, comprising:

• providing a device substrate of semiconductor material, having a top face;
• forming a first integrated device within sensor region in a top face of the device substrate, and with an active area adjacent to the top facethe first sensor region including a buried cavity and a membrane suspended above the buried cavity;
• coupling a capping substrate cap to the device substrate above the top face so as to cover the first integrated device, the coupling comprising forming and form a first empty space in a position corresponding to the active area above the membrane, the cap including a plurality of access ducts that places the first empty space in fluid communication with an environment outside of the assembly, the plurality of access ducts being of different sizes or a different inter-spacing being provided therebetween or a combination of different sizes and different inter-spacing;
• and
• forming electrical-contact elements from the top face of the device substrate to a bottom face of the device substrate for electrical connection of the first integrated device with the outside of the substrate-level assembly.

A process for manufacturing an electronic device, comprising:

• forming a substrate-level an assembly, the forming including:
• providing a device substrate of semiconductor material, having a top face;
• forming a first integrated device within the device substrate and with an active area adjacent to the top face buried cavity in a device substrate of semiconductor material, a first membrane being located above the buried cavity;
• forming a second buried cavity in the device substrate, a second membrane being located above the second buried cavity;
• coupling a capping substrate cap to the device substrate above the top face so as to cover the first integrated device and second membranes, the coupling comprising forming a first empty space in a position corresponding to the active area and a second empty space, the first empty space being located over the first membrane, the second empty space being located over the second membrane, the first empty space being fluidly isolated from the second empty space;
• and
• forming electrical-contact elements in the device substrate for electrical connection of the first integrated device with the outside of the substrate-level assembly;
• and
• encasing the substrate-level assembly in a package, for coating and mechanically protecting the substrate-level assembly;
• wherein the encasing comprises providing a base body to support the substrate-level assembly, and coating laterally the substrate-level sides of the assembly with a an insulative coating region material.

An assembly comprising:

• an article, and
• a base substrate having a first surface and a second surface;
• a sensor assembly adapted to monitor at least one condition of the article, the sensor assembly comprising:
• a first device substrate of semiconductor material, having a top face and housing including a first integrated device provided with sensor region having an active area adjacent to the top face;
• a second device substrate of semiconductor material having a first surface and including an integrated circuit, the first device substrate being located on the first substrate of the second device substrate, the integrated circuit being electrically coupled to the first sensor region;
• a capping substrate cap coupled to the first device substrate above the top face so as to cover the first integrated device in such a manner sensor region so that a first empty space is provided in a position corresponding to above the active area;
• and
• electrical-contact elements extending from the first surface to the second surface of the base substrate for electrical connection of the first integrated device sensor region and the integrated circuit outside of the substrate-level assembly.