Group III—nitride double-heterojunction field effect transistor

A semiconductor structure, comprising:

• a buffer layer;
• a pseudomorphic back-barrier layer disposed on the buffer layer;
• a channel layer disposed on a surface of the pseudomorphic back-barrier layer, the channel layer being lattice matched to the buffer layer;
• a top barrier layer disposed on the channel layer;
• and
• a Group III-Nitride transition layer disposed between the buffer layer and the pseudomorphic back-barrier layer;
• and
• wherein the buffer layer and the pseudomorphic back-barrier layer are both Group III-Nitride materials;
• wherein the Group III-Nitride material of the buffer layer is different from the Group III-Nitride material in the back-barrier layer;
• and
• wherein the composition of the Group III-Nitride material in the transition layer varies from the composition of the Group III-Nitride material in the buffer layer to the composition of the Group III-Nitride material in the pseudomorphic back-barrier layer as a function of distance from the buffer layer.

A semiconductor structure, comprising:

• a buffer layer;
• a back-barrier layer disposed on the buffer layer, the back-barrier layer having a thickness less than a thickness to prevent the formation of misfit dislocations due to in-plane lattice mismatch between the back-barrier layer and the buffer layer;
• a single channel layer disposed on a surface of the back-barrier layer, the channel layer being lattice matched to the buffer layer;
• a top barrier layer disposed on the channel layer.

A semiconductor structure, comprising:

• a buffer layer;
• a back-barrier layer disposed on the buffer layer, the back-barrier layer having a thickness less than a thickness to prevent the formation of misfit dislocations due to in-plane lattice mismatch between the back-barrier layer and the buffer layer;
• a channel layer disposed on a surface of the back-barrier layer, the channel layer being lattice matched to the buffer layer;
• a top barrier layer disposed on the channel layer;
• and
• a Group III-Nitride transition layer disposed between the buffer layer and the back-barrier layer;
• and
• wherein the transition layer includes impurity doping to suppress the generation of free carriers by polarization mismatches across the transition layer.

A semiconductor structure, comprising:

• a buffer layer;
• a back-barrier layer disposed on the buffer layer, the back-barrier layer having a thickness less than a thickness to prevent the formation of misfit dislocations due to in-plane lattice mismatch between the back-barrier layer and the buffer layer;
• a single channel layer disposed on a surface of the back-barrier layer, the channel layer being lattice matched to the buffer layer and having an in-plane lattice constant;
• a top barrier layer disposed on the channel layer;
• and
• wherein the back-barrier layer has a lattice structure strained to match the in-plane lattice constant of the channel layer, the total thickness of the barrier layer being less than a thickness at which misfit dislocations are nucleated to relieve strain in the barrier layer resulting from an in-plane lattice mismatch with the channel layer.

A semiconductor structure, comprising:

• a buffer layer;
• a pseudomorphic back-barrier layer disposed on the buffer layer, the back barrier layer being entirely pseudomorphic from a bottom surface of the pseudomorphic back-barrier layer to an upper surface of the pseudomorphic back-barrier layer;
• a channel layer disposed on, and in direct contact with, the upper surface of the pseudomorphic back-barrier layer, the channel layer being lattice matched to the buffer layer;
• a top barrier layer disposed on the channel layer.

A structure, comprising:

• a buffer layer;
• a pseudomorphic back-barrier layer disposed on the buffer layer;
• a single conduction channel layer disposed on, and in direct contact with, an upper surface of the pseudomorphic back-barrier layer, the channel layer being lattice matched to the buffer layer;
• a top barrier layer disposed on the channel layer;
• and
• wherein the structure, have the single conducting channel, suppresses additional strain induced into the channel layer due to lattice mismatches.

A structure, comprising

• a buffer layer;
• a channel layer,
• a pseudomorphically strained back-barrier layer disposed between the buffer layers and the channel layer;
• wherein the channel layer has the same in-plane lattice parameter as the buffer layer;
• an epitaxial top barrier layer forming a heterojunction with the channel layer creating a polarization mismatch resulting in formation of a 2DEG in the channel layer;
• wherein the epitaxial top barrier layer is grown pseudomorphically on the channel layer with such epitaxial top barrier being grown with a thickness kept thin enough to prevent formation of misfit dislocations due to the in-plane lattice mismatch with the channel layer and with the epitaxial top barrier layer;
• and
• wherein the channel layer is in direct contact with the pseudomorphically strained back-barrier layer.