Method for disabling a legacy loop detect circuit in a beta node
AssigneeDAP Holding B.U.
InventorRichard Mourn
Life of this patent
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Abstract
A method for disabling or removing a Legacy loop detect circuit to eliminate the circuit erroneously detecting a legacy loop during a IEEE-1394 serial bus initialization. The method includes providing a programmable code to the Legacy loop detect circuit for increasing a reset count to a value greater than three (3) to the Legacy loop circuit thus reducing the probability of an erroneous disconnect of a Beta node connection. This method provides for more robust Beta loop node operation during high frequency bus resets.
Claims6
A method of increasing filter values in a Legacy loop detect circuit in a Beta node and providing a more robust Beta node operation during high frequency bus resets, the step comprising:
- providing a programmable code to the Legacy loop detect circuit for increasing a filter value to a value greater than the values defined by IEEE-1394-2008;
- and
- increasing the value of the programmable code, having CONFIG-TIMEOUT time-filter value, to a value greater than 166.9 μsec before a transition from P2:Active state to P11:
- Untested state occurs.
A method of increasing filter values in a Legacy loop detect circuit in a Beta node and providing a more robust Beta node operation during high frequency bus resets, the step comprising:
- providing a programmable code to the Legacy loop detect circuit for increasing a filter value to a value greater than the values defined by IEEE-1394-2008, wherein the programmable code, having CONFIG-TIMEOUT time filter value, is increased to a value greater than 166.9 μsec before a transition from P2:Active state to P11:
- Untested state occurs;
- and
- increasing a reset Count filter value in the programmable code to a value greater than (3) three before a transition from P2:
- Active state to a P11:
- Untested state occurs.
A method of increasing filter values in a Legacy loop detect circuit in a Beta node and providing a more robust Beta node operation during high frequency bus resets, the step comprising:
- providing a programmable code to the Legacy loop detect circuit for increasing a filter value to a value greater than the values defined by IEEE-1394-2008, wherein the programmable code, having MAX_ARB_STATE_TIME time filter value, is increased to a value greater than 400 μsec before a transition from P2:
- Active state to P11:
- Untested state occurs.
Dependencies are inferred from the claim text.