Switching device, a communication device, and a method for processing a carrier

A communication device, comprising:

• an antenna;
• a switching component, comprising:
• an antenna terminal;
• a switch comprising a first switch terminal and a second switch terminal, the first switch terminal coupled to the antenna terminal, the switch comprising at least one transistor at least one of over or in a silicon region comprising an oxygen impurity concentration of smaller than about 3×1017 atoms per cm3;
• and
• a transceiver terminal coupled to the second switch terminal, wherein the transceiver terminal is at least one of configured to provide a signal received via the antenna terminal or configured to receive a signal to be transmitted via the antenna terminal;
• wherein the antenna terminal is coupled to the antenna;
• and
• a signal processing unit coupled to the transceiver terminal,
• wherein the at least one transistor comprises a p-n junction extending at least partially in the silicon region, wherein a p-type doping and an n-type doping is provided such that a depth of the depletion region of the p-n junction is larger than about 3 μm;
• wherein the silicon region comprises at least one first-type doped body region with a doping concentration of in the range from about 1012 atoms per cm3 to about 1014 atoms per cm3, and
• wherein the silicon region comprises at least one second-type doped source region and at least one second-type doped drain region with a doping concentration in the range from about 1015 atoms per cm3 to about 1023 atoms per cm respectively, the at least one body region, the at least one source region and the at least one drain region forming the at least one transistor.

A method for processing a carrier, the method comprising:

• forming at least one transistor at least one of over or in a silicon region, the silicon region comprising an oxygen impurity concentration of smaller than about 3×1017 atoms per cm3, the at least one transistor comprising a p-n-junction with a p-type doping and an n-type doping provided such that a depth of the depletion region of the p-n-junction is larger than about 3 μm, and
• after forming the at least one transistor performing an anneal at a temperature in the range from about 250° C. to about 550° C.;
• wherein the silicon region comprises at least one first-type doped body region with a doping concentration of in the range from about 1012 atoms per cm3 to about 1014 atoms per cm3, and
• wherein the silicon region comprises at least one second-type doped source region and at least one second-type doped drain region with a doping concentration in the range from about 1015 atoms per cm3 to about 1023 atoms per cm respectively, the at least one body region, the at least one source region and the at least one drain region forming the at least one transistor.