DVB-S2 LDPC decoder using overlapped decoding scheme
AssigneeKorea University Research and Business Foundation
InventorsJun-Young Wi, Jun Heo, Sung Won Kim
Life of this patent
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Abstract
Provided is a low density parity check decoder, which includes a bit node calculating unit configured to calculate a bit node, a check node calculating unit configured to calculate a check node, a control unit configured to control calculation of the bit node and the check node, and a storage unit configured to store calculation values of the bit node or the check node, wherein the control unit calculates the bit node or the check node so that the node calculations are overlapped, by using an address offset value of the storage unit, thereby reducing a decoding time.
Claims6
A low density parity check decoder, comprising:
- a bit node calculating unit configured to calculate a bit node;
- a check node calculating unit configured to calculate a check node;
- a control unit configured to control calculations of the bit node and the check node;
- and
- a storage unit configured to store calculation values of the bit node or the check node,
- wherein the control unit calculates the bit node or the check node so that the node calculations are overlapped, by using an address offset value of the storage unit,
- wherein the control unit calculates address offset values of storage units connected to the bit node calculating unit or check node calculating unit, which performs calculation first, arranges the address offset values in ascending order, calculates value differences among the arranged address offset values, and controls so that a next node calculation is performed from a smaller address offset value of two address offset value having a greatest value difference.
Dependencies are inferred from the claim text.