Analog-to-digital converter with offset calibration
AssigneeAnalog Devices, Inc.
InventorsHongxing Li, Michael C. W. Coln, Michael Mueck
Life of this patent
Estimating the term…
Abstract
An analog-to-digital converter (ADC) circuit including error correction circuitry for correcting offset drifts in an ADC, such as a successive approximation register (SAR) ADC. The offset drifts can be reduced, such as by sampling the offset following an analog-to-digital conversion and subsequently providing an error correction signal based on the sampled offset.
Claims20
A method of providing error correction in an analog-to-digital conversion system, the method comprising:
- sampling a first analog signal using a sampling switch, and converting the sampled first analog signal into a first digital value;
- sampling a second analog signal that includes a digital-to-analog conversion of the first digital value wherein,
- the sampling including closing and re-opening of the sampling switch, converting the sampled second analog signal into a second digital value;
- and
- providing a digital error correction signal based on a difference between the first digital value and the second digital value.
A method of providing error correction in an analog-to-digital conversion system, the system including a first capacitor digital-to-analog converter (CDAC), the method comprising:
- sampling a first analog signal onto the first CDAC using a sampling switch, and converting the sampled first analog signal into a first digital value;
- storing the first digital value in the first CDAC to produce a second analog signal;
- sampling the second analog signal converting the sampled second analog signal into a second digital value;
- and
- providing a corrected digital value based on the difference between the first digital value and the second digital value.
An analog-to-digital conversion system for converting an analog signal to a digital value and providing error correction, the system comprising:
- a first capacitor digital-to-analog converter (CDAC) configured to sample a first analog signal, the sampling introducing a first additive error to the sampled first analog signal;
- an analog-to-digital converter (ADC) configured to convert the sampled first analog signal to a first digital value, the converting introducing a second additive error to the first digital value;
- a second CDAC configured to sample a third additive error created by the closing and re-opening of a sampling switch, wherein the ADC converts the sampled third additive error to a second digital value, the converting introducing a fourth additive error to the second digital value;
- and
- a summation circuit configured to provide a corrected ADC digital value based on the difference between the first digital value and the second digital value.
An analog-to-digital conversion system for converting an analog signal to a digital value and providing error correction, the system comprising:
- a capacitor digital-to-analog converter (CDAC) configured to sample a first analog signal, the sampling introducing a first additive error to the sampled first analog signal;
- an analog-to-digital converter (ADC) configured to convert the sampled first analog signal to a first digital value, the converting introducing a second additive error to the first digital value;
- wherein a lower portion of the CDAC is then re-configured to sample a third additive error created by the closing and re-opening of a sampling switch, wherein the ADC converts the sampled third additive error to a second digital value, the converting introducing a fourth additive error to the second digital value;
- and
- a summation circuit configured to provide a corrected ADC digital value based on the difference between the first digital value and the second digital value.
Dependencies are inferred from the claim text.