Apparatus and methods for high linearity voltage variable attenuators

A radio frequency (RF) system having controllable attenuation, the RF system comprising:

• a voltage variable attenuator (VVA) comprising:
• an input terminal;
• an output terminal;
• a control circuit configured to control an amount of attenuation along a signal path through the VVA between the input terminal and the output terminal, wherein the control circuit is configured to generate a first control voltage and a first complementary control voltage that changes inversely with respect to the first control voltage;
• a first shunt circuit electrically connected in shunt to the signal path, wherein the first shunt circuit comprises at least one n-type field effect transistor (NFET) having a gate biased by the first control voltage;
• and
• a second shunt circuit electrically connected in shunt to the signal path, wherein the second shunt circuit comprises at least one p-type field effect transistor (PFET) having a gate biased by the first complementary control voltage;
• wherein the VVA further comprises an inductor in the signal path, wherein the inductor is electrically connected between a first signal node of the signal path and a second signal node of the signal path, wherein the first and second shunt circuits are electrically connected to the first signal node.

A voltage variable attenuator (VVA) for radio frequency signals comprising:

• a control circuit configured to control an amount of attenuation of the VVA, wherein the control circuit is configured to generate a control voltage and a complementary control voltage that changes inversely with respect to the control voltage;
• and
• a shunt attenuation circuit comprising:
• a first shunt circuit electrically connected between a signal node and a first DC voltage, wherein the first shunt circuit comprises at least one n-type field effect transistor of a first type having a gate biased by the control voltage;
• a first DC blocking capacitor electrically connected between the signal node and a first internal node;
• a second shunt circuit electrically connected between the first internal node and a second internal node, wherein the second shunt circuit comprises at least one field effect transistor of a second type opposite to the first type having a gate biased by the complementary control voltage;
• and
• a second DC blocking capacitor electrically connected between the second internal node and the first DC voltage.