Sacrificial epitaxial gate stressors
AssigneeSamsung Electronics Co., Ltd.
InventorsJorge A. Kittl, Joon Goo Hong, Dharmendar Reddy Palle, Mark S. Rodder
Life of this patent
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Abstract
A method for fabricating a fin field effect transistor (finFET) device with a strained channel. During fabrication, after the fin is formed, a sacrificial epitaxial gate stressor is deposited on the fin, causing strain in the fin. SD structures are then formed to anchor the ends of the fin, and the sacrificial epitaxial gate stressor is removed.
Claims20
A method for fabricating a strained channel for a fin field effect transistor (finFET) device having a fin comprising the channel, the fin being substantially a single crystal of a material having in its relaxed state a first lattice constant, the method comprising:
- forming, on the channel of the fin, a stressing structure to induce strain on the channel, the stressing structure being substantially a single crystal of a material having in its relaxed state a second lattice constant different from the first lattice constant;
- forming a first source drain recess at a first end of the fin;
- forming a second source drain recess at a second end of the fin;
- forming a first source drain within the first source drain recess;
- forming a second source drain within the second source drain recess;
- and
- removing the stressing structure.
A method for fabricating a strained channel for a fin field effect transistor (finFET) device having a fin comprising the channel, the fin being substantially a single crystal of a material having in its relaxed state a first lattice constant, the method comprising:
- forming, on the fin, a stressing structure, the stressing structure being substantially a single crystal of a material having in its relaxed state a second lattice constant different from the first lattice constant;
- forming a first source drain recess at a first end of the fin;
- forming a second source drain recess at a second end of the fin;
- forming a first source drain within the first source drain recess;
- forming a second source drain within the second source drain recess;
- and
- etching the stressing structure with an etch having an etch selectivity of at least 40:1 for etching the stressing structure selectively to the fin.
A method for straining a fin of a fin field effect transistor (finFET) device, the fin being substantially a single crystal of a material having in its relaxed state a first lattice constant, the method comprising:
- forming, on a channel of the fin, a stressing structure to induce strain on the channel, the stressing structure being substantially a single crystal of a material having in its relaxed state a second lattice constant different from the first lattice constant;
- forming a first source drain recess at a first end of the fin;
- forming a second source drain recess at a second end of the fin;
- forming a first source drain at a first end of the fin;
- forming a second source drain at a second end of the fin;
- forming an interlevel dielectric (ILD) layer over the first source drain and the second source drain;
- and
- removing the stressing structure.
Dependencies are inferred from the claim text.