Magnetoresistive random access memory device and method of manufacturing the same

A method of manufacturing a magnetoresistive random access memory (MRAM) device, comprising:

• forming an insulating interlayer structure on a substrate, the insulating interlayer structure including a first insulating interlayer, an etch-stop layer, and a second insulating interlayer sequentially stacked;
• after forming the insulating interlayer structure, forming a lower electrode through the insulating interlayer structure, the lower electrode extending in all of the first insulating interlayer, the etch-stop layer and the second insulating interlayer;
• sequentially forming a magnetic tunnel junction (MTJ) structure layer and an upper electrode on the lower electrode and the insulating interlayer structure;
• and
• patterning the MTJ structure layer by a physical etching process using the upper electrode as an etching mask to form an MTJ structure that at least partially contacts the lower electrode, wherein a portion of the insulating interlayer structure under the etch-stop layer is substantially protected by the etch-stop layer so as not to be etched by the physical etching process.

A method to form a magnetoresistive random access memory (MRAM) device, the method comprising:

• forming a first insulating interlayer on a top surface of a substrate, the first insulating interlayer comprising a bottom surface and a top surface that is opposite the bottom surface, the bottom surface of the first insulating interlayer being proximate to the top surface of the substrate, and the top surface of the first insulating interlayer being distal to the top surface of the substrate;
• forming at least one first wiring structure in the first insulating interlayer, the at least one first wiring structure comprising a top surface, and at least a portion of the top surface of the at least one first wiring structure being at substantially a same level at the top surface of the first insulating interlayer;
• forming an etch-stop layer on the top surface of the first insulating interlayer, the etch-stop layer comprising a bottom surface and a top surface that is opposite the bottom surface, the bottom surface of the etch-stop layer being proximate to the top surface of the first insulating interlayer, the top surface of the etch-stop layer being distal to the top surface of the first insulating interlayer, and the bottom surface of the etch-stop layer being lower than the top surface of the at least one first wiring structure;
• forming a second insulating interlayer on the top surface of the etch-stop layer, the second insulating interlayer comprising a bottom surface and a top surface that is opposite the bottom surface, the bottom surface of the second insulating interlayer being proximate to the top surface of the etch-stop layer, and the top surface of the first insulating interlayer being distal to the top surface of the etch-stop layer;
• forming at least one lower electrode disposed in the second insulating interlayer, the at least one lower electrode extending through the second insulating interlayer and contacting a corresponding first wiring structure;
• and
• forming at least one magnetic tunnel junction (MTJ) structure, each MTJ structure being electrically connected to a corresponding to a lower electrode.