Method of manufacturing semiconductor device for reducing grain size of polysilicon

A method of manufacturing a semiconductor device, comprising:

• providing a silicon substrate with multiple layers formed on a front side and a backside, wherein at least a dielectric layer is formed on the backside of the silicon substrate;
• defining isolation regions and active regions at the front side of the silicon substrate, wherein the active regions are separated by the isolation regions;
• treating the multiple layers formed at the front side and the backside of the silicon substrate, so as to remain the dielectric layer as an outermost layer exposed at the backside of the silicon substrate;
• and
• depositing a polysilicon layer on the isolation regions and the active regions at the front side of the silicon substrate in the presence of the dielectric layer as the outermost layer exposed at the backside of the silicon substrate.