Frequency synthesizer with dynamic phase and pulse-width control

A frequency synthesizer, comprising:

• a count circuit configured to modify a stored count value by an adjustment value;
• and
• an output clock generator configured to generate an output clock signal having rising and falling edges that are based at least in part on the stored count value satisfying a count threshold,
• wherein the count circuit is further configured to alter at least one of a period or phase of the output clock signal based at least in part on dynamically modifying the count threshold of the count circuit.

A method of synthesizing an output clock signal, comprising:

• modifying a count value, stored by a count circuit, by an adjustment value;
• generating an output clock signal having rising and falling edges that are based at least in part on the stored count value satisfying a count threshold;
• and
• altering at least one of a period or phase of the output clock signal via dynamically modifying the count threshold of the count circuit.