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AssigneeLiming Xiu
InventorLiming Xiu
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Circuits of a TAF-DPS clock generator implemented on programmable logic chip comprise: 1) a base time unit generator created from configurable blocks, or on-chip PLL, or on-chip DLL, said base time unit generator produces a plurality of phase-evenly-spaced-signals; 2) a TAF-DPS frequency synthesizer created by configuring configurable blocks of said programmable logic chip, said TAF-DPS frequency synthesizer takes said plurality of phase-evenly-spaced-signals as its input. Methods of creating flexible clock signal to drive application comprise: 1) selecting one or more strategic areas in said programmable logic chip; 2) creating one or more TAF-DPS clock generator for each said area by using the configurable resource in said area; 3) creating control function to control the frequency and duty-cycle of the TAF-DPS clock generator output, said control function can be circuit created from configuring configurable blocks, said control function can also be achieved by software; 4) driving the circuits in application by the flexible clock generated from said TAF-DPS clock generator.
A TAF-DPS clock generator implemented on programmable logic chip, for generating a flexible clock signal, comprises:
A method of creating TAF-DPS clock generators on a programmable logic chip, comprising the steps of:
A method of driving circuits in an application by a flexible clock signal generated from a TAF-DPS clock generator, said TAF-DPS clock generator is implemented on a programmable logic chip, comprises the steps of:
Dependencies are inferred from the claim text.