Stability controlled high frequency chopper-based oscillator

Circuitry for providing an oscillating output signal, comprising:

• a transconductance circuit having a first input, a second input, an output, and comprising:
• a first transistor;
• a second transistor;
• chopping circuitry for alternatively connecting, in a first clock cycle phase, a first node to a first terminal of the first transistor and a second node to a first terminal of the second transistor and, in a second clock cycle phase following the first clock cycle phase, the first node to the first terminal of the second transistor and the second node to the first terminal of the first transistor;
• a first current path, responsive to a first amount of current conducted by the first transistor, and comprising a first plurality of transistors and a first node for providing the output;
• and
• a second current path, responsive to a second amount of current conducted by the second transistor, and comprising a second plurality of transistors and a second node;
• and
• circuitry coupled to the second node for maintaining the second plurality of transistors in a saturation region of operation;
• an oscillator circuit coupled to receive voltage from the output of the transconductance circuit, wherein the oscillating output signal is responsive to an output of the oscillator circuit;
• circuitry for providing a first voltage to the first input of the transconductance circuit;
• and
• a frequency controlled circuit for providing a second voltage to the second input of the transconductance circuit.

A method of operating circuitry for providing an oscillating output signal, the circuitry comprising a transconductance circuit having a first input, a second input, an output, and comprising:

• a first transistor, wherein the first transistor comprises a first transistor in an input stage of the transconductance circuit;
• a second transistor, wherein the second transistor comprises a second transistor in the input stage of the transconductance circuit;
• a first capacitor connected from a gate of the first transistor to a drain of the second transistor;
• and
• a second capacitor connected from a gate of the second transistor to a drain of the first transistor;
• and
• the method comprising:
• alternatively connecting, in a first clock cycle phase, a first node to a first terminal of the first transistor and a second node to a first terminal of the second transistor and, in a second clock cycle phase following the first clock cycle phase, the first node to the first terminal of the second transistor and the second node to the first terminal of the first transistor;
• receiving a voltage from the output of the transconductance circuit by an oscillator circuit, wherein the oscillating output signal is responsive to an output of the oscillator circuit;
• providing a first voltage to the first input of the transconductance circuit;
• and
• providing a second voltage to the second input of the transconductance circuit from a frequency controlled circuit.