Image sensor architecture with power saving readout

A method comprising:

• selecting a subset of pixels in a pixel array comprising a plurality of pixels for readout, each pixel in the subset readable through at least one corresponding pixel readout circuit;
• performing a parallel conditional full pixel sampling for each of the selected subset of pixels;
• operating an ADC during a variable power-on period of a readout period, where the length of the power-on period varies in relation to the number of parallel conditional full pixel samplings performed, and powering down the ADC in another portion of the readout period;
• and
• converting, with the ADC, samples corresponding to those pixels in the set of pixels during the power-on period.

An integrated-circuit image sensor comprising:

• a pixel array comprising a plurality of pixels and corresponding readout circuitry configured to sample a subset of the plurality of pixels in parallel;
• a plurality of classifiers each configured to classify a different one of the pixels in a sampled subset, wherein a pixel is classified as an above threshold pixel in response to a determination that a sample associated with the pixel is greater than or equal to a conversion threshold and less than a saturation threshold;
• an Analog-to-Digital Converter (ADC);
• and
• a controller configured to operate the ADC during a power-on period of a readout period, wherein the ADC converts samples associated with above threshold pixels in the sampled subset during the power-on period to produce converted pixel values, the length of the power-on period based on the number of above threshold pixels, the controller further configured to power down the ADC during at least one portion of the readout period when the ADC is not converting samples associated with above threshold pixels.