US 9,521,342 B2Granted

Amplifier sharing technique for low power charge mode readout in CMOS image sensors

AssigneeForza Silicon Corporation

InventorAli Mesgarani

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Abstract

Presented herein are novel shared amplifier charge mode readout architectures for image sensors, for example, configured to process a pair of signals comprising photointegration and reset signals from a pixel. The invention encompasses a novel 2-channel configuration wherein a single amplifier can serve the two channels in alternating phases. In the first phase, a selected pair of signals from the first channel is read out to an ADC using the amplifier while the readout components of the second channel are reset. In the second phase, a selected pair of signals from the second channel is read out an ADC using the amplifier while the readout components of the first channel are reset. This alternating arrangement allows a single amplifier to be shared between two readout channels. Level shifting may be included in the signal pathway to modulate output swing and other signal parameters.

Claims8

Dependent claims

A readout circuit comprising

a fully differential amplifier comprising a first input and a corresponding first output;
and a second input and a corresponding second output;
two readout channels, each readout channel comprising
a plurality of sample and hold capacitor pairs, each comprising a first and second sample and hold capacitor;
a feedback capacitor pair comprising a first and a second capacitor;
an analog to digital converter, comprising a first and a second input;
and
switches and connection lines configured such that:
signals from a selected sample and hold capacitor pair can be connected to or disconnected from the inputs of the amplifier, wherein the first sample and hold capacitor of the pair can be connected to or disconnected from the first amplifier input and the second sample and hold capacitor of the pair can be connected to or disconnected from the second amplifier input;
the first output of the amplifier can be connected to and disconnected from the first input of the amplifier across the first feedback capacitor;
the second output of the amplifier can be connected to and disconnected from the second input of the amplifier across the second feedback capacitor;
the first amplifier output can be connected to or disconnected from the first analog to digital converter input;
the second amplifier output can be connected to or disconnected from the second analog to digital converter input;
the two plates of the first feedback capacitor can be connected to short the capacitor and can be disconnected from each other;
and
the two plates of the second feedback capacitor can be connected to short the capacitor and can be disconnected from each other.

13 more elements

A method of performing charge mode readout of a plurality of stored signal pairs using a two channel readout circuit having an amplifier, said amplifier having a first input and corresponding first output and second input and corresponding second output;

wherein the readout is performed in alternating phases by changing the configuration of switches and connections of the circuit, wherein:
during the first phase, the connections and switches of the readout circuit are configured such that:
a first stored signal is connected to the first input of the amplifier and a second stored signal is connected to the second input of the amplifier, wherein the first amplifier output is fed back across a first feedback capacitor and the second amplifier output is fed back across the second feedback capacitor;
and the first and second amplifier outputs are connected to the separate inputs of a first analog to digital converter;
the plates of a third capacitor are connected to each other to clear charge from the third capacitor;
the plates of a fourth capacitor are connected to each other to clear charge from the fourth capacitor, and wherein the third and fourth capacitors are not connected to the amplifier during this first phase;
and in a second phase, the connections and switches of the readout circuit are configured such that:
the first and second feedback capacitors are disconnected from the amplifier;
the plates of the first capacitor are connected to each other to clear charge from the first capacitor;
the plates of the second capacitor are connected to each other to clear charge from the second capacitor;
a third stored signal is connected to the first input of the fully differential amplifier and a fourth stored signal is connected to the second input of the fully differential amplifier, wherein the first amplifier output is fed back across the third feedback capacitor and the second amplifier output is fed back across the fourth feedback capacitor;
and the first and second amplifier outputs are connected to the separate inputs of a second analog to digital converter.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/875,588Filed 5 Oct 2015 · us provisional application
Priority: 3 Oct 2014
Published: US 2016/0100116 A17 Apr 2016
Granted: 13 Dec 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H04N 25/77
Addressed sensors, e.g. MOS or CMOS sensors: pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
H03F 3/45475
Characterised by the way of implementation of the active amplifying circuit in the differential amplifier: using IC blocks as the active…
H04N 25/709
SSIS architectures; Circuits associated therewith: circuitry for control of the power supply
H04N 25/78
Addressed sensors, e.g. MOS or CMOS sensors: readout circuits for addressed sensors, e.g. output amplifiers or A/D converters