Monitoring and control of reference clocks to reduce bit error ratio
AssigneeCiena Corporation
InventorShawn Barrow
Life of this patent
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AssigneeCiena Corporation
InventorShawn Barrow
Estimating the term…
A method for reducing a frequency error, including: applying a plurality of dither values to a local reference clock over a first time interval; sampling, during the first time interval and using the local reference clock, a first plurality of data values received over an asynchronous link, where the first plurality of data values are transmitted over the asynchronous link based on a remote reference clock; tracking a plurality of errors from sampling the first plurality of data values; and adjusting, based on the plurality of errors, a frequency of the local reference clock to reduce the frequency error between the local reference clock and the remote reference clock.
A method for reducing a frequency error, comprising:
A non-transitory computer readable medium (CRM) comprising instructions stored thereon for reducing a frequency error, the instructions when executed by a processor causes the processor to:
A system for reducing a frequency error, comprising:
Dependencies are inferred from the claim text.