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US 9,520,895 B2Granted
Low power analog to digital converter
AssigneeIntel Corporation
InventorsTakao Oshita, George L. Geannopoulos, David E. Duarte, J Keith Hodgson, James S. Ayers, Avner Kornfeld, Jonathan P. Douglas
Life of this patent
Estimating the term…
Abstract
Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal.
Claims20
An apparatus comprising:
- at least two analog multiplexers;
- at least two analog to digital converters (ADC) to receive outputs of the at least two analog multiplexers and to generate corresponding at least two digital outputs;
- and
- a digital multiplexer to receive the at least two digital outputs, and to selectively provide a logic output according to one of the selected at least two digital outputs.
1 more element
A method comprising:
- coupling an input analog signal to a first capacitor during a first phase of a clock signal;
- closing a first switch of an integrator during the first phase such that an input and an output of an amplifier of the integrator are electrically shorted;
- coupling one of a reference signal or a logic signal to the first capacitor during a second phase of the clock signal;
- and
- closing a second switch of the integrator during the second phase, the second switch to couple the input and the output of the amplifier via a second capacitor.
2 more elements
An apparatus comprises:
- a first analog to digital converter (ADC) including:
- a first capacitor;
- and
- at least two switches, one of which is operable to couple an input analog signal to the first capacitor of the first ADC, and the other switch is operable to couple a first reference signal or a first logic signal to the first capacitor of the first ADC;
- and
- a second ADC including:
- a first capacitor;
- and
- at least two switches, one of which is operable to couple the input analog signal to the first capacitor of the second ADC, and the other switch is operable to couple a second reference signal or a second logic signal to the first capacitor of the second ADC.
6 more elements
Dependencies are inferred from the claim text.