Glitch free bandwidth-switching scheme for an analog phase-locked loop (PLL)

A method for adjusting a bandwidth of a phase-locked loop (PLL), comprising:

• controlling a capacitance of a first variable capacitive element of a voltage-controlled oscillator (VCO) of the PLL;
• controlling a capacitance of a second variable capacitive element of the VCO based on a voltage of a node of a resistor-capacitor (RC) network comprising a resistor in parallel with a first switch;
• opening the first switch for a first bandwidth mode;
• and
• closing the first switch in a transition from the first bandwidth mode to a second bandwidth mode.

An apparatus for adjusting a bandwidth (BW) of a feedback loop for a phase-locked loop (PLL), comprising:

• means for generating an oscillating signal comprising a first variable capacitor and a second variable capacitor;
• means for charging and discharging one or more capacitors based on the feedback loop to generate a first control signal, wherein the first control signal is configured to control a capacitance of the first variable capacitor;
• and
• means for adjusting the BW of the feedback loop by generating a second control signal to control a capacitance of the second variable capacitor, wherein the means for adjusting the BW is configured to:
• change a resistance of a resistor-capacitor (RC) network configured to process the second control signal;
• and
• alter a series resistance between the RC network and an output of the means for charging and discharging the one or more capacitors.