Methods and devices for error correction of a signal using delta sigma modulation

A method for correcting long-term phase drift of a crystal oscillator in a numerically-controlled oscillator, the numerically controlled-oscillator having a phase increment value and including a phase accumulator clocked at a clock cycle by an oscillator signal from the crystal oscillator, the method comprising:

• determining the phase error in the in oscillator signal in comparison with an external time base;
• delta-sigma modulating the phase error to generate a delta-sigma error bitstream;
• conditionally adding or subtracting an error correction step size from the phase increment value in each clock cycle based on the delta-sigma error bitstream, to create a modulated phase increment value;
• and
• adding the modulated phase increment value to the phase accumulator to generate an error-corrected output digital signal.

A system for generating an error-corrected digital signal having a selected frequency based on a reference crystal oscillator, wherein the oscillator outputs an oscillator signal at an oscillator frequency, the system comprising:

• a memory element storing a phase increment value;
• a phase accumulator clocked at the oscillator frequency;
• an error measurement circuit to determine the phase error in the oscillator signal in comparison with an external time base;
• a delta-sigma modulator to modulate the phase error and produce a delta-sigma error bitstream;
• and
• an error-correction circuit to conditionally add or subtract an error correction step size from the phase increment value in each clock cycle based on the delta-sigma error bitstream, to create a modulated phase increment value,
• wherein the modulated phase increment value is added to the phase accumulator in each clock cycle to generate the error-corrected digital signal.

A numerically-controlled oscillator for generating an error-corrected digital signal having a selected frequency based on a reference crystal oscillator, wherein the oscillator outputs an oscillator signal at an oscillator frequency, comprising:

• a memory element storing a phase increment value;
• an error-correction circuit including
• a bit shifter to shift the phase increment value by a predetermined bit shift to create an error correction step size, wherein the error correction step size is given a sign based upon a delta-sigma modulated error signal to produce a signed error correction step size, and
• an adder to produce a modulated phase increment value from the sum of the phase increment value and the signed error correction step size;
• and
• a phase accumulator clocked at the oscillator frequency to add the modulated phase increment value to an output value to update and store the output value, wherein the updated output value is the error-corrected digital signal.