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US 9,520,872 B2Granted
Linear equalizer with variable gain
AssigneeQUALCOMM Incorporated
InventorBupesh Pandita
Life of this patent
Estimating the term…
Abstract
A linear equalizer is configured with load transistors that load a corresponding differential pair of transistors. The linear equalizer is configured to selectively diode connect each load transistor to boost a high frequency gain.
Claims18
An equalizer, comprising;
- a current source transistor;
- a differential pair of transistors, wherein a source for each differential pair transistor couples to a terminal for the current source transistor;
- a pair of load transistors corresponding to the differential pair of transistors, each load transistor having a drain coupled to a drain for the corresponding differential pair transistor;
- a pair of capacitors corresponding to the pair of load transistors, each capacitor being coupled between a gate of the corresponding load transistor and a node selected from the group consisting of a power supply node and a ground node;
- and
- a pair of source follower transistors corresponding to the pair of load transistors, each source follower transistor having a gate coupled to the drain of the corresponding load transistor and having a source coupled to the gate of the corresponding load transistor.
3 more elements
A method of operating an equalizer, comprising:
- in an equalizer including a differential pair of transistors, a current source coupled to a source for each differential pair transistor, and a pair of load transistors corresponding to the differential pair of transistors, each load transistor having a drain coupled to a drain of the corresponding differential pair transistor, steering a tail current from the current source between the differential pair of transistor responsive to a differential input signal to produce a differential output signal across a pair of terminals for the differential pair transistors;
- while an instantaneous frequency for the differential input signal is below a first frequency, diode connecting each load transistor to load the differential pair of transistors with a first impedance;
- and
- while the instantaneous frequency for the differential input signal is above the first frequency, breaking the diode connection for each load transistor to load the differential pair of transistors with a second impedance that is greater than the first impedance.
1 more element
An equalizer, comprising:
- a differential pair of transistors configured to steer a tail current responsive to a differential input voltage;
- a pair of load transistors corresponding to the differential pair of transistors, each load transistor having a drain coupled to a drain for the corresponding differential pair transistor;
- and
- means for selectively diode connecting the drain for each load transistor to its gate while a frequency content for the differential input voltage is below a first frequency for the equalizer, and for selectively breaking the diode connection for each load transistor while the frequency content for the differential input voltage is above the first frequency.
1 more element
Dependencies are inferred from the claim text.