Charge carrier transport facilitated by strain
AssigneeInternational Business Machines Corporation
InventorsAnirban Basu, Guy M. Cohen
Life of this patent
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Abstract
A semiconductor structure and formation thereof. The semiconductor structure has a first semiconductor layer with a first lattice structure and a second epitaxial semiconductor layer that is lattice-matched with the first semiconductor layer. At least two source/drain regions, which have a second lattice structure, penetrate the second semiconductor layer and contact the first semiconductor layer. A portion of the second semiconductor layer is between the source/drain regions and has a degree of uniaxial strain that is based, at least in part, on a difference between the first lattice structure and the second lattice structure.
Claims20
A semiconductor structure comprising:
- a first semiconductor layer with a first lattice structure;
- a second semiconductor layer that is lattice-matched with the first semiconductor layer, wherein the second semiconductor layer is epitaxial with the first semiconductor layer;
- and
- at least two source/drain regions with a second lattice structure, wherein the source/drain regions penetrate the second semiconductor layer and contact the first semiconductor layer, wherein a portion of the second semiconductor layer is between the source/drain regions, wherein the portion has a degree of uniaxial strain that is based, at least in part, on a difference between the first lattice structure and the second lattice structure.
A method of forming a semiconductor structure comprising:
- forming a layer of a first semiconductor material on top of a layer of a semi-insulating semiconductor material, wherein the first semiconductor material and the semi-insulating semiconductor material are lattice-matched;
- etching the layer of first semiconductor material to a depth that, at least, exposes the semi-insulating semiconductor material and forms a semiconductor channel region, wherein the semiconductor channel region has a first end and a second end;
- and
- forming a first source/drain region at the first end of the semiconductor channel region and a second source/drain region at the second end of the semiconductor channel region, wherein the first source/drain region and the second source/drain region are further comprised of a second semiconductor material, wherein the second semiconductor material is lattice-mismatched to the first semiconductor material and to the semi-insulating semiconductor material.
A semiconductor structure comprising:
- a semi-insulating semiconductor layer composed of a doped indium phosphide material;
- a semiconductor layer composed of In0.53Ga0.47As, wherein the semiconductor layer is epitaxial with the semi-insulating semiconductor layer, wherein the semiconductor layer is lattice-matched with the semi-insulating semiconductor layer;
- and
- at least two source/drain regions composed of InyGa(1-y)As, wherein y has a range between 0 and 1, wherein the source/drain regions penetrate the semiconductor layer and contact the semi-insulating semiconductor layer, wherein the source/drain regions are lattice-mismatched with the semi-insulating semiconductor layer and the semiconductor layer, wherein a portion of the semiconductor layer is between source/drain regions, wherein the portion has a degree of uniaxial strain that is based, at least in part, on the lattice-mismatch between the source/drain regions and both the semi-insulating semiconductor layer and the semiconductor layer.
Dependencies are inferred from the claim text.