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US 9,520,495 B2Granted
Transistor including a stressed channel, a method for fabricating the same, and an electronic device including the same
AssigneeSK hynix Inc.
InventorYun-Hyuck Ji
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Abstract
A semiconductor device includes a first channel, a second channel, a first strained gate electrode including a first lattice-mismatched layer for applying a first stress to the first channel, and a second strained gate electrode including a second lattice-mismatched layer for applying a second stress to the second channel.
Claims7
A method for fabricating a semiconductor device, the method comprising:
- preparing a substrate which includes a first transistor region and a second transistor region;
- forming a first strained gate electrode which includes a first lattice-mismatched crystalline silicon layer disposed over the first transistor region;
- and
- forming a second strained gate electrode which includes a second lattice-mismatched crystalline silicon layer disposed over the second transistor region,
- wherein the forming of the first lattice-mismatched crystalline silicon layer comprises:
- forming an arsenic-doped crystalline silicon layer by doping only arsenic;
- and
- forming an undoped crystalline silicon layer disposed over the arsenic-doped crystalline silicon layer, the undoped crystalline silicon layer being undoped with arsenic, and
- wherein the forming of the second lattice-mismatched crystalline silicon layer comprises:
- forming a boron-doped crystalline silicon layer;
- and
- forming a germanium-doped crystalline silicon layer, the germanium-doped crystalline silicon layer being disposed over the boron-doped crystalline silicon layer.
9 more elements
Dependencies are inferred from the claim text.