Methods of forming a semiconductor device with a gate stack having tapered sidewalls

A method of forming a semiconductor device, comprising:

• performing a first etch process to etch through a first portion of a silicon dummy layer;
• performing a second etch process to etch through a second portion of the silicon dummy layer, wherein the second etch process tapers a first portion of a sidewall of the silicon dummy layer;
• and
• performing a third etch process to etch through a third portion of the silicon dummy layer, wherein:
• the third etch process further etches a portion of a gate dielectric underlying the silicon dummy layer,
• the third etch process tapers a second portion of the sidewall of the silicon dummy layer different than the first portion of the sidewall, and
• the first portion of the sidewall and the second portion of the sidewall together define a tapered sidewall of the silicon dummy layer;
• forming a sidewall spacer adjacent the tapered sidewall of the silicon dummy layer, wherein a sidewall of the sidewall spacer conforms to the tapered sidewall of the silicon dummy layer;
• and
• replacing the silicon dummy layer with a metal gate electrode, wherein a sidewall of the metal gate electrode conforms to the sidewall of the sidewall spacer.

A method of forming a semiconductor device, comprising:

• forming a gate dielectric;
• forming a capping layer over the gate dielectric;
• forming a silicon dummy layer over the capping layer;
• performing a first etch process to etch through a first portion of the silicon dummy layer;
• performing a second etch process to etch through a second portion of the silicon dummy layer, the second etch process different than the first etch process;
• performing a third etch process to concurrently etch through a third portion of the silicon dummy layer and a portion of the capping layer to taper a sidewall of the capping layer and a sidewall of the silicon dummy layer;
• and
• replacing the silicon dummy layer with a metal gate electrode.