A lateral double diffused metal oxide semiconductor (LDMOS) device, comprising:
- a P-type substrate, which has an upper surface and a lower surface opposite to each other in a vertical direction;
- an epitaxial layer, which is formed on the P-type substrate and in direct contact with the upper surface, and has an epitaxial layer surface opposite to the upper surface in the vertical direction;
- a P-type high voltage well, which is formed in the epitaxial layer, and is in direct contact with the upper surface of the P-type substrate;
- a P-type body region, which is formed in the epitaxial layer and on the P-type high voltage well, the P-type body region being located between and connecting the P-type high voltage well and the epitaxial layer surface, wherein the P-type body region includes a peak concentration region which has a highest P-type impurity concentration in the P-type body region, the peak concentration region being in direct contact with and beneath the epitaxial layer surface;
- an N-type well, which is formed in the epitaxial layer, the N-type well being in direct contact with and beneath the epitaxial layer surface in the vertical direction, and being adjacent to the P-type body region in a lateral direction;
- an isolation oxide region, which is formed on the epitaxial layer to define an operation region;
- a drift oxide region, which is formed in the operation region and on the epitaxial layer, the drift oxide region being in direct contact with the N-type well in the vertical direction;
- a gate, which is formed in the operation region and on or above the epitaxial layer, the gate overlaying at least part of the drift oxide region, part of the N-type well and part of the P-type body region, part of the gate being in direct contact with the epitaxial layer;
- an N-type contact region, which is formed in the P-type body region, and is in direct contact with and beneath the epitaxial layer surface in the vertical direction;
- a P-type contact region, which is formed in the P-type body region, the P-type contact region being in direct contact with and beneath the epitaxial layer surface in the vertical direction, and being adjacent to the N-type contact region in the lateral direction;
- an top source, which is formed on the epitaxial layer, and is in direct contact with the N-type contact region and the P-type contact region in the vertical direction;
- a bottom source, which is formed beneath the lower surface of the P-type substrate in the vertical direction, and is in direct contact with the lower surface;
- and
- an N-type drain, which is formed in the N-type well, and is in direct contact with and beneath the epitaxial layer surface, wherein the N-type drain is located between the drift oxide region and the isolation oxide region;
- wherein part of the P-type body region is located beneath the N-type contact region and the P-type contact region in the vertical direction, wherein the peak concentration region is not located below the N-type contact region and the P-type contact region in the vertical direction, and the peak concentration region is adjacent to the N-type contact region in the lateral direction;
- wherein a conductive current flows from the N-type drain to the bottom source in a normal operation when the LDMOS device is turned ON.