Ion implantation for improved etch performance
AssigneeVarian Semiconductor Equipment Associates, Inc.
InventorsTristan Y. Ma, Maureen K. Petterson
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AssigneeVarian Semiconductor Equipment Associates, Inc.
InventorsTristan Y. Ma, Maureen K. Petterson
Estimating the term…
Provided herein are approaches for patterning a semiconductor device. In an exemplary approach, a method includes providing a set of patterning features atop a layer of a semiconductor device, and implanting ions into a sidewall surface of the set of patterning features. The method includes implanting ions at an angle nonparallel with the sidewall surface, for example, approximately 60° to a plane normal to the sidewall surface. The method further includes etching the semiconductor device after the ions are implanted into the sidewall surface. As a result, by using an angled ion implantation as a pretreatment prior to etching, photoresist roughness is minimized, and sidewall striation and etch-induced line edge roughness is reduced. Approaches herein may also improve etch selectivity with respect to underlying layers disposed under the photoresist, as well as improved photoresist profiles.
A method comprising:
A method comprising:
A method for patterning a semiconductor device, the method comprising:
Dependencies are inferred from the claim text.