Superconducting phase-controlled hysteretic magnetic Josephson junction JMRAM memory cell

A method for writing a digital state to a JMRAM memory cell in a Josephson magnetic random access memory (JMRAM) system during a data write operation, the method comprising:

• generating a word-write current on a word-write line to select a respective one of a plurality of rows of an array of JMRAM memory cells, each of the JMRAM memory cells comprising a phase hysteretic magnetic Josephson junction (PHMJJ) that is magnetically coupled to the word-write line and to a bit-write line and that is configured to store the digital state corresponding to one of a first binary state and a second binary state;
• generating a bit-write current on the bit-write line associated with each of a plurality of columns of the array of JMRAM memory cells, the digital state of the PHMJJ being set in response to the word-write current and the bit-write current;
• and
• generating a directional bias current through the PHMJJ in a predetermined direction during the data write operation to set the digital state of the PHMJJ in the first binary state, the directional bias current providing a superconducting phase of the PHMJJ corresponding to the first binary state.

A Josephson magnetic random access memory (JMRAM) array system comprising:

• a plurality of JMRAM memory cells, each of the plurality of JMRAM memory cells comprising:
• a phase hysteretic magnetic Josephson junction (PHMJJ);
• a directional write element configured to provide a directional bias current during a data write operation to set the PHMJJ in a positive π-state corresponding to a first binary state;
• and
• at least one Josephson junction;
• a plurality of word-write lines each configured to conduct a respective word-write current that selects a given row of the plurality of JMRAM memory cells during the data write operation;
• a plurality of bit-write lines each configured to conduct a respective bit-write current to write a digital state corresponding to one of the first binary state and a second binary state into the PHMJJ associated with each JMRAM memory cell of the given row of plurality of JMRAM memory cells, the PHMJJ being magnetically coupled to a respective one of the plurality of word-write lines and a respective one of the plurality of bit-write lines;
• a plurality of word-read lines each configured to conduct a respective word-read current that selects a given row of plurality of JMRAM memory cells during a data read operation;
• and
• a plurality of bit-read lines each configured to conduct a respective bit-read current through each of the plurality of JMRAM memory cells in a given column, the at least one Josephson junction providing an indication of the stored digital state during the data read operation in response to the word-read current, the bit-read current, and a superconducting phase provided by the PHMJJ.