Methods and apparatus for designing and constructing dual write memory circuits with voltage assist
AssigneeCisco Technology, Inc.
InventorsSundar Iyer, Shang-Tse Chuang, Thu Nguyen
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AssigneeCisco Technology, Inc.
InventorsSundar Iyer, Shang-Tse Chuang, Thu Nguyen
Estimating the term…
Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent memory requests, an efficient dual-port six transistor (6T) SRAM bit cell is proposed. The dual-port 6T SRAM cell uses independent word lines and bit lines such that the true/data side and the false/data-complement side of the SRAM bit cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two independent read operations in a single cycle using spatial domain multiplexing. Single-ended writes are enabled by adjusting the VDD power voltage supplied to a memory cell when writes are performed such that a single word line and bit line pair can be used write either a logical “0” or logical “1” into either side of the SRAM bit cell.
A dual-port random access memory system, comprising:
A method of operating a dual-port random access memory system, comprising:
Dependencies are inferred from the claim text.