Resistive change memory
AssigneeKabushiki Kaisha Toshiba
InventorsTomoaki Inokuchi, Mizue Ishikawa, Hideyuki Sugiyama, Yoshiaki Saito, Tetsufumi Tanamoto
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AssigneeKabushiki Kaisha Toshiba
InventorsTomoaki Inokuchi, Mizue Ishikawa, Hideyuki Sugiyama, Yoshiaki Saito, Tetsufumi Tanamoto
Estimating the term…
A resistive change memory according to an embodiment includes: a memory cell including a resistive change element comprising a first and second terminals, and a semiconductor element, the semiconductor element including a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, and a third semiconductor layer of a second conductivity type that is different from the first conductivity type, the third semiconductor layer being disposed between the first semiconductor layer and the second semiconductor layer, the first semiconductor layer being connected to the second terminal of the resistive change element; and a read unit configured to perform a read operation by applying a first read voltage between the first terminal and the second semiconductor layer, and then applying a second read voltage that is lower than the first read voltage between the first terminal and the second semiconductor layer.
A resistive change memory comprising:
A resistive change memory comprising:
Dependencies are inferred from the claim text.