Data processing apparatus, data processing method, and non-transitory computer readable medium
AssigneeFuji Xerox Co., Ltd.
InventorDaisuke Matsumoto
Life of this patent
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Abstract
A data processing apparatus includes an analyzer and a controller. The analyzer analyzes data in plural regions of target data to thereby determine, for each region, a block size to be applied as a unit of processing of data in the region. The controller configures, for each region, a circuit corresponding to the block size to be applied to the region, in a reconfigurable circuit in a case of processing the data in the plural regions of the target data.
Claims8
A data processing apparatus comprising:
- an analyzer that analyzes data in a plurality of regions of target data to thereby determine, for each region, a block size to be applied as a unit of processing of data in the region;
- and
- a controller that configures, for each region, a circuit corresponding to the block size to be applied to the region, in a reconfigurable circuit in a case of processing the data in the plurality of regions of the target data, wherein
- the analyzer analyzes data for each region to thereby derive indicators predicted for a data process that is performed by using each of a plurality of block sizes as the unit of processing, compare the indicators, and select a block size to be applied to the region from among the plurality of block sizes, and
- the analyzer derives, for each region, the indicators each reflecting a processing time predicted for the data process that is performed by using each of the plurality of block sizes as the unit of processing, and selects a block size that satisfies a selection condition on the processing time from among the plurality of block sizes.
A data processing apparatus comprising:
- an analyzer that analyzes data in a plurality of regions of target data to thereby determine, for each region, a block size to be applied as a unit of processing of data in the region;
- and
- a controller that configures, for each region, a circuit corresponding to the block size to be applied to the region, in a reconfigurable circuit in a case of processing the data in the plurality of regions of the target data, wherein
- the analyzer analyzes data for each region to thereby derive indicators predicted for a data process that is performed by using each of a plurality of block sizes as the unit of processing, compare the indicators, and select a block site to he applied to the region from among the plurality of block sizes, and
- the analyzer derives, for each block size among the plurality of block sizes, the indicators each including a reconfiguration time taken to configure a circuit corresponding to the block size in the reconfigurable circuit and a data processing time taken to perform a data process using the circuit corresponding to the block size.
A data processing method comprising:
- analyzing data in a plurality of regions of target data to thereby determine, for each region, a block size to be applied as a unit of processing of data in the region,
- the analyzing of data including analyzing data for each region to thereby derive indicators predicted for a data process that is performed by using each of a plurality of block sizes as the unit of processing, comparing the indicators, and selecting a block size to be applied to the region from among the plurality of block sizes,
- the indicators, derived for each region, each reflecting a processing time predicted for the data process that is performed by using each of the plurality of block sizes as the unit of processing, and a block size being selected that satisfies a selection condition on the processing time from among the plurality of block sizes;
- and
- configuring, for each region, a circuit corresponding to the block size to be applied to the region, in a reconfigurable circuit in a case of processing the data in the plurality of regions of the target data.
A non-transitory computer readable medium storing a program causing a computer to execute a process for data processing, the process comprising:
- analyzing data in a plurality of regions of target data to thereby determine, for each region, a block size to be applied as a unit of processing of data in the region,
- the analyzing of data including analyzing data for each region to thereby derive indicators predicted for a data process that is performed by using each of a plurality of block sizes as the unit of processing, comparing the indicators, and selecting a block size to be applied to the region from among the plurality of block sizes,
- the indicators, derived for each region, each reflecting a processing time predicted for the data process that is performed by using each of the plurality of block sizes as the unit of processing, and a block size being selected that satisfies a selection condition on the processing time from among the plurality of block sizes;
- and
- configuring, for each region, a circuit corresponding to the block size to be applied to the region, in a reconfigurable circuit in a case of processing the data in the plurality of regions of the target data.
Dependencies are inferred from the claim text.