Pipeline dependency resolution

A method, comprising:

• executing, using a first pipeline of a processor, a first type of instruction for different single-instruction-multiple-data (SIMD) groups, wherein the first pipeline is configured to execute the first type of instruction but not a second type of instruction;
• executing, using a second pipeline of the processor, the second type of instruction for different SIMD groups, wherein the second pipeline is configured to execute the second type of instruction but not the first type of instruction;
• indicating, by the processor, in response to dispatch of an instruction of the second type to the second pipeline, a youngest valid instruction of the first type that is in the first pipeline and in the same SIMD group as the dispatched instruction;
• and
• stalling, by the processor, performance of the dispatched instruction until determining completion of the indicated instruction based on determining that none of a set of pipeline stages in the first pipeline store the indicated instruction.

An apparatus, comprising:

• an interpolate pipeline configured to execute interpolate instructions for different slots, wherein, for a given slot, the interpolate pipeline is configured to execute interpolation instructions in parallel for graphics elements assigned to the given slot;
• and
• a sample pipeline configured to execute sample instructions for different slots, wherein, for a given slot, the sample pipeline is configured to execute sample instructions in parallel for graphics elements assigned to the given slot;
• wherein the apparatus is configured to:
• dispatch instructions assigned to a slot in program order;
• assign a tag to a sample instruction;
• in response to dispatch of the sample instruction, assign the tag to a youngest valid interpolation instruction in the interpolation pipeline from the same slot as the sample instruction;
• and
• stall performance of the sample instruction until completion of the tagged interpolation instruction, wherein the apparatus is configured to detect completion of the tagged interpolation instruction by determining that none of a set of pipeline stages in the interpolate pipeline store instructions that are assigned the tag.