Method, apparatus, and system for operating shared resource in asynchronous multiprocessing system

A method for operating a shared hardware resource in an asynchronous multiprocessing system, comprising:

• accessing by a first and a second processor in the asynchronous multiprocessing system, a shared hardware resource through a same hardware resource lock register, wherein the same hardware resource lock register is coupled to the first and the second processor which are separately located from the same hardware resource lock register through first and second respective buses;
• wherein the hardware resource lock register is implemented by a plurality of register circuitry portions within the same hardware resource lock register, including:
• a first register circuitry portion comprising a lock register circuitry portion,
• a second register circuitry portion comprising an unlock circuitry register portion, and
• a third register circuitry portion comprising a lock state register circuitry portion, the method comprising:
• delivering, by the first processor in the asynchronous multiprocessing system, a lock command to a first input of the lock register circuitry portion of the same hardware resource lock register, and the lock command is multiplexed with a lock state signal received at a second input of the lock register circuitry portion, wherein the received lock state signal is sent from the lock state register circuitry portion of the same hardware resource lock register to further perform one of the following:
• when the received lock state signal at the second input of the lock register circuitry portion is in an unlock state, outputting by the lock register circuitry portion, a lock enable signal to the lock state register circuitry portion to set the same hardware resource lock register to a state of being locked by the first processor, so that the first processor operates the shared resource, wherein after the operating, by the first processor, the shared resource, the method further comprises:
• sending, by the first processor, an unlock command to a first input of the unlock register circuitry portion of the same hardware resource lock register in order that the lock state register circuitry portion of the same hardware resource lock register restores the state of the same hardware resource lock register to the unlocked state;
• or
• ignoring by the lock register circuitry portion, the lock command at the first input when the received lock state signal at the second input of the lock register circuitry portion is in a lock state.

A hardware resource lock register which is implemented by a plurality of register circuitry portions comprised within the hardware resource lock register, which operate in the shared hardware resource, comprising:

• a processor,
• a first register circuitry portion comprising a lock register circuitry portion,
• a second register circuitry portion comprising an unlock register circuitry portion, and
• a third register circuitry portion comprising a lock state register circuitry portion;
• wherein:
• the lock state register circuitry portion, configured to provide a lock state signal of the same hardware resource lock register;
• and
• the lock register circuitry portion, configured to:
• receive at a first input, a lock command sent by the first processor in the asynchronous multiprocessing system, wherein the lock command is multiplexed with a lock state signal received at a second input of the lock register circuitry portion, wherein the received lock state signal is sent from the lock state register circuitry portion of the hardware resource lock to further perform one of the following:
• when the received lock state signal at the second input of the lock register circuitry portion is in an unlock state, outputting by the lock register circuitry portion, a lock enable signal to the lock state register circuitry portion to set the same hardware resource lock register to a state of being locked by the first processor, so that the first processor operates the shared resource, wherein after the operating, by the first processor, the shared resource, the method further comprises:
• sending, by the first processor, an unlock command to a first input of the unlock register circuitry portion of the same hardware resource lock register in order that the lock state register circuitry portion of the same hardware resource lock register restores the state of the same hardware resource lock register to the unlocked state;
• or
• not returning any signal by the lock register circuitry portion to the lock state register circuitry portion when the received lock state signal at the second input of the lock register circuitry portion is in a lock state, and ignore the lock command.

A first processor in an asynchronous multiprocessing system having at least a second processor, comprising:

• a lock unit circuitry portion, configured to deliver a lock command to a same hardware resource lock register when the same hardware resource lock register is in an unlocked state, such that the lock unit circuitry portion of the first processor lock the same hardware resource lock register to prevent the second processor from accessing a shared hardware resource through the same hardware resource lock register, wherein the same hardware resource lock register is coupled to the first and the second processor which are separately located from the same hardware resource lock register through first and second respective buses;
• wherein the hardware resource lock register is implemented by a plurality of register circuitry portions comprised within the same hardware resource lock register, including:
• a first register circuitry portion comprising a lock register circuitry portion,
• a second register circuitry portion comprising an unlock register circuitry portion, and
• a third register circuitry portion comprising a lock state register circuitry portion:
• wherein the lock command is received in a first input of the lock register circuitry portion of the same hardware resource lock register, and the lock command is multiplexed with a lock state signal received at a second input of the lock register circuitry portion, wherein the received lock state signal is sent from the lock state register circuitry portion of the same hardware resource lock register to perform one of the following:
• not returning any signal by the lock register circuitry portion to the lock state register circuitry portion when the received lock state signal at the second input of the lock register circuitry portion is in a lock state, or
• when the received lock state signal at the second input of the lock register circuitry portion is in an unlock state, outputting by the lock register circuitry portion, a lock enable signal to the lock state register circuitry portion to set the same hardware resource lock register to a state of being locked by the first processor;
• and
• a resource operating unit circuitry portion, configured to operate the shared resource when the same hardware resource lock register is in a state of being locked by the processor, wherein the unlock unit circuitry portion is configured to send an unlock command to a first input of the unlock register portion, wherein the resource operating unit circuitry portion operates the shared resource, so that the lock state register portion of the same hardware resource lock register restores the state of the same hardware resource lock register to the unlocked state.