High latency interface between hardware components

A system, comprising:

• a hard disk controller configured to i) transmit a first gate signal, a write clock signal, mode selection data, and first data to be stored on a storage medium, and ii) receive a read clock signal and second data stored on the storage medium, wherein the mode selection data includes control data associated with at least one of the first data and the second data;
• and
• a read/write channel configured to i) receive the first gate signal, the write clock signal, the mode selection data, and the first data, ii) transmit the read clock signal, iii) while the first gate signal is asserted during a read operation, transfer the second data from the storage medium to the hard disk controller based on the mode selection data and the read clock signal, and iv) while the first gate signal is asserted during a write operation, transfer the first data from the hard disk controller to the storage medium based on the mode selection data and the write clock signal,
• wherein the first gate signal is continuously asserted (i) during the read operation from a time subsequent to a beginning of the read operation to completion of the read operation and (ii) during the write operation from a time subsequent to a beginning of the write operation to completion of the write operation,
• wherein the first gate signal is asserted to control transfer of the mode selection data including the control data, and
• wherein the control data indicates whether the first data or the second data is continued from a previous sector or is associated with a new sector.