Error recovery following speculative execution with an instruction processing pipeline

Apparatus for processing data comprising:

• means for processing program instructions having a plurality of pipeline stages;
• means, coupled to a pipeline stage of said means for processing program instructions and responsive to at least one signal value within said pipeline stage, for detecting a processing error associated with an erring program instruction within said pipeline stage;
• means, coupled to said means for detecting a processing error and responsive to detection of a processing error by said means for detecting a processing error, for initiating an error recovery operation, wherein
• said pipeline stage includes a first main storage element means and a second main storage element means for sampling a signal for respective program instructions at respective operational sampling points in an alternating sequence, said error recovery operation includes replacing an incorrect signal value stored in one of said first main storage element means and said second main storage element means with a correct value subsequent to said operational sampling point while a signal value for a following program instruction remains stored in an other of said first main storage element means and said second main storage element means;
• and
• means for controlling supply of program instructions, said means for controlling coupled to said means for processing program instructions and responsive to program instructions from a plurality of different program threads to control supply of an interleaved stream of program instructions from different program threads, said means for processing program instructions storing signal values from a first program thread in said first main storage element means, and signal values from a second different program thread being stored in said second main storage element means,
• wherein a thread identifying signal accompanies a program instruction passing along said instruction processing pipeline and is coupled to said first main storage element and said second main storage element to gate sampling thereby of said signal at said operational sampling point.

A method for processing data comprising:

• processing program instructions in an instruction processing pipeline having a plurality of pipeline stages;
• in response to at least one signal value within a pipeline stage of said instruction processing pipeline, detecting a processing error associated with an erring program instruction within said pipeline stage;
• in response to detection of a processing error, initiating an error recovery operation;
• sampling a signal with a pipeline stage for respective program instructions at respective operational sampling points in an alternating sequence using a first main storage element and a second main storage element;
• and
• replacing an incorrect signal value stored in one of said first main storage element and said second main storage element with a correct value subsequent to said operational sampling point while a signal value for a following program instruction remains stored in the other of said first main storage element and said second main storage element, supplying an interleaved stream of program instructions from different program threads to said instruction processing pipeline, signal values from a first program thread in said first main storage element, and signal values from a second different program thread in said second main storage element,
• wherein a thread identifying signal accompanies a program instruction passing along said instruction processing pipeline and is coupled to said first main storage element and said second main storage element to gate sampling thereby of said signal at said operational sampling point.