Local power gate (LPG) interfaces for power-aware operations

A processor comprising:

• a microcode store of a core, the microcode store to store microcode;
• local power gate (LPG) hardware coupled to locally-gated circuitry of the core;
• and
• main core circuitry of the core, wherein the core is to execute the microcode to:
• monitor a current status of the locally-gated circuitry;
• select a first code path of a plurality of code paths for execution when the current status allows execution of micro-operations of a first length only and a current string operation is shorter in length than a pre-defined threshold;
• select a second code path of the plurality of code paths for execution when the current status allows execution of the micro-operations of a second length only and the current string operation is shorter in length than the pre-defined threshold;
• select a third code path of the plurality of code paths for execution of the micro-operations of a third length when the current string operation is longer in length than the pre-defined threshold;
• at a beginning of the first code path, initiate a first power-up sequence by the LPG hardware to power up the locally-gated circuitry for execution of the micro-operations of the second length and continue execution of the micro-operations of the first length without waiting for the first power-up sequence to complete;
• and
• at a beginning of the third code path, initiate a second power-up sequence by the LPG hardware to power up the locally-gated circuitry for execution of the micro-operations of the third length and continue execution of the micro-operations of at least the first length or the second length without waiting for the second power-up sequence to complete.

A method comprising:

• monitoring, by microcode executed by a processor, a current status of a locally-gated circuitry of a core of the processor, wherein the locally-gated circuitry is power gated by local power gate (LPG) hardware;
• selecting a first code path of a plurality of code paths for execution when the current status allows execution of micro-operations of a first length only and a current string operation is shorter in length than a pre-defined threshold;
• selecting a second code path of the plurality of code paths for execution when the current status allows execution of the micro-operations of a second length only and the current string operation is shorter in length than the pre-defined threshold;
• selecting a third code path of the plurality of code paths for execution of the micro-operations of a third length when the current string operation is longer in length than the pre-defined threshold;
• at a beginning of the first code path,
• initiating a first power-up sequence by the LPG hardware to power up the locally-gated circuitry for execution of the micro-operations of the second length, and
• continuing execution of the micro-operations of the first length without waiting for the first power-up sequence to complete;
• and
• at a beginning of the third code path,
• initiating a second power-up sequence by the LPG hardware to power up the locally-gated circuitry for execution of the micro-operations of the third length, and
• continuing execution of the micro-operations of at least the first length or the second length without waiting for the second power-up sequence to complete.