Ultra-low power bias current generation and utilization in current and voltage source and regulator devices
OwnerAli Tasdighi Farinventor
Life of this patent
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Abstract
A bias current topology with embodiments in current source, current reference, (pseudo bandgap) voltage reference, and bandgap voltage reference that operate at ultra low currents and low power supply voltages which may use main stream standard digital Complementary Metal-Oxide-Semiconductor (CMOS) processes. The bias current topology uses chiefly a self cascode (SC), whose active resistor MOSFET is paced in series with the gate input of the MOSFETs that help generate the proportional to absolute temperature (PTAT) voltage that is applied to the active resistor MOSFET to produce a bias current.
Claims14
A bias current generator system comprising:
- a first current generator comprising:
- a first amplifier having a built in offset voltage tracking a proportional to first absolute temperature (PTAT) voltage (VPTAT);
- a first bias resistor metal-oxide-semiconductor field effect transistor (MOSFET) operating in the linear region and forming a first bias resistor, wherein the gate input terminals of the amplifier carrying the VPTAT are in series with source-drain terminals of the first bias resistor MOSFET;
- and
- wherein a first bias current is generated as a ratio of the first VPTAT over the resistance of the first bias resistor MOSFET and where adjustments can be made to the amplitude and temperature coefficient (TC) of the first bias current.
A bias current generator system comprising:
- a first current generator comprising:
- a first amplifier having inputs connected to the output of a first differential voltage follower, wherein the first differential voltage follower has a built in offset voltage tracking a proportional to first absolute temperature (PTAT) voltage (VPTAT);
- a first bias resistor metal-oxide-semiconductor field effect transistor (MOSFET) operating in the linear region and forming a first bias resistor, wherein the gate input terminals of the first differential voltage follower carrying the VPTAT are in series with source-drain terminals of the first bias resistor MOSFET;
- wherein the first amplifier output generates the bias current which flows through the source-drain of the bias resistor MOSFET until the amplifier input voltages are substantially equalized;
- and
- wherein a first bias current is generated as a ratio of the first VPTAT over the resistance of the first bias resistor MOSFET and where adjustments can be made to the amplitude and temperature coefficient (TC) of the first bias current.
Dependencies are inferred from the claim text.