QPSK signal conjugate relationship identification method and apparatus, and dispersion compensation method and system

A quadrature phase shift keying (QPSK) signal conjugate relationship identification apparatus, wherein the apparatus comprises:

• a QPSK modulator, configured to receive a first binary sequence signal and use the first binary sequence signal to modulate an optical signal to obtain a first signal;
• and receive a second binary sequence signal and use the second binary sequence signal to modulate the optical signal to obtain a second signal;
• and
• a processing module, configured to:
• when the QPSK modulator uses the first binary sequence signal to modulate the optical signal, determine, within a first predetermined range, a first bias voltage in the QPSK modulator, so that the first signal at the first bias voltage is a QPSK signal and a root mean square power of the first signal at the first bias voltage is the smallest, and determine a second range within the first predetermined range according to the first bias voltage;
• when the QPSK modulator uses the second binary sequence signal to modulate the optical signal, determine, within the second range, a second bias voltage in the QPSK modulator, so that a root mean square power of the second signal at the second bias voltage is the smallest;
• and determine a conjugate relationship of the QPSK signal according to a value relationship between the first bias voltage and the second bias voltage;
• wherein the processing module comprises:
• a processor, configured to control a child Mach-Zehnder (MZ) modulator of the QPSK modulator to work at a null point, and control a bias voltage of a parent MZ modulator of the QPSK modulator to change at a set adjustment step and obtain multiple third bias voltages and multiple fourth bias voltages, wherein the third bias voltages fall within the first predetermined range and the fourth bias voltages fall within the second range;
• an optical-to-electrical conversion component, configured to perform optical-to-electrical conversion on the first signal at the multiple third bias voltages to obtain multiple first electrical signals;
• and perform optical-to-electrical conversion on the second signal at the multiple fourth bias voltages to obtain multiple second electrical signals;
• a root mean square power detector, configured to perform root mean square power detection on the multiple first electrical signals that are output by the optical-to-electrical conversion component, so as to obtain root mean square powers of the multiple first signals, and perform root mean square power detection on the multiple second electrical signals that are output by the optical-to-electrical conversion component, so as to obtain root mean square powers of the multiple second signals;
• and
• an analog-to-digital converter, configured to perform analog-to-digital conversion on the root mean square powers of the multiple first signals and the root mean square powers of the multiple second signals, wherein
• the processor is further configured to select a third bias voltage of a first signal corresponding to the smallest root mean square power from the root mean square powers of the multiple first signals, and use the selected third bias voltage as the first bias voltage;
• and select a fourth bias voltage of a second signal corresponding to the smallest root mean square power from the root mean square powers of the multiple second signals, and use the selected fourth bias voltage as the second bias voltage.

A dispersion compensation system, wherein the system comprises an identification apparatus and a compensation apparatus, wherein the identification apparatus comprises:

• a QPSK modulator, configured to receive a first binary sequence signal and use the first binary sequence signal to modulate an optical signal to obtain a first signal;
• and receive a second binary sequence signal and use the second binary sequence signal to modulate the optical signal to obtain a second signal;
• and
• a processing module, configured to:
• when the QPSK modulator uses the first binary sequence signal to modulate the optical signal, determine, within a first predetermined range, a first bias voltage in the QPSK modulator, so that the first signal at the first bias voltage is a QPSK signal and a root mean square power of the first signal at the first bias voltage is the smallest, and determine a second range within the first predetermined range according to the first bias voltage;
• when the QPSK modulator uses the second binary sequence signal to modulate the optical signal, determine, within the second range, a second bias voltage in the QPSK modulator, so that a root mean square power of the second signal at the second bias voltage is the smallest;
• and determine a conjugate relationship of the QPSK signal according to a value relationship between the first bias voltage and the second bias voltage;
• and
• the compensation apparatus is configured to:
• according to a conjugate relationship of a QPSK signal, which is obtained by the identification apparatus, perform optical dispersion pre-compensation coding on an electrical signal to be input into a QPSK modulator;
• wherein the processing module comprises:
• a processor, configured to control a child Mach-Zehnder (MZ) modulator of the QPSK modulator to work at a null point, and control a bias voltage of a parent MZ modulator of the QPSK modulator to change at a set adjustment step and obtain multiple third bias voltages and multiple fourth bias voltages, wherein the third bias voltages fall within the first predetermined range and the fourth bias voltages fall within the second range;
• an optical-to-electrical conversion component, configured to perform optical-to-electrical conversion on the first signal at the multiple third bias voltages to obtain multiple first electrical signals;
• and perform optical-to-electrical conversion on the second signal at the multiple fourth bias voltages to obtain multiple second electrical signals;
• a root mean square power detector, configured to perform root mean square power detection on the multiple first electrical signals that are output by the optical-to-electrical conversion component, so as to obtain root mean square powers of the multiple first signals, and perform root mean square power detection on the multiple second electrical signals that are output by the optical-to-electrical conversion component, so as to obtain root mean square powers of the multiple second signals;
• and
• an analog-to-digital converter, configured to perform analog-to-digital conversion on the root mean square powers of the multiple first signals and the root mean square powers of the multiple second signals, wherein
• the processor is further configured to select a third bias voltage of a first signal corresponding to the smallest root mean square power from the root mean square powers of the multiple first signals, and use the selected third bias voltage as the first bias voltage;
• and select a fourth bias voltage of a second signal corresponding to the smallest root mean square power from the root mean square powers of the multiple second signals, and use the selected fourth bias voltage as the second bias voltage.

A quadrature phase shift keying (QPSK) signal conjugate relationship identification method, wherein the method comprises:

• controlling a QPSK modulator to receive a first binary sequence signal, using the first binary sequence signal to modulate an optical signal to obtain a first signal, and determining, within a first predetermined range, a first bias voltage in the QPSK modulator, so that the first signal at the first bias voltage is a QPSK signal and a root mean square power of the first signal at the first bias voltage is the smallest;
• controlling the QPSK modulator to receive a second binary sequence signal, using the second binary sequence signal to modulate the optical signal to obtain a second signal, determining a second range within the first predetermined range according to the first bias voltage, and determining, within the second range, a second bias voltage in the QPSK modulator, so that a root mean square power of the second signal at the second bias voltage is the smallest;
• and
• determining a conjugate relationship of the QPSK signal according to a value relationship between the first bias voltage and the second bias voltage;
• wherein determining the first bias voltage in the QPSK modulator comprises:
• controlling a child MZ modulator to work at a null point;
• controlling a bias voltage of a parent MZ modulator to change at a set adjustment step and obtain multiple third bias voltages, wherein the third bias voltages fall within the first predetermined range;
• performing optical-to-electrical conversion and filtering on the first signal at the multiple third bias voltages to obtain multiple first electrical signals;
• performing root mean square power detection on the multiple first electrical signals to obtain root mean square powers of the multiple first signals;
• selecting a third bias voltage of a first signal corresponding to the smallest root mean square power from the root mean square powers of the multiple first signals, and using the selected third bias voltage as the first bias voltage;
• wherein determining the second bias voltage in the QPSK modulator comprises:
• controlling the child MZ modulator to work at a null point;
• controlling the bias voltage of the parent MZ modulator to change at a set adjustment step and obtain multiple fourth bias voltages, wherein the fourth bias voltages fall within the second range;
• performing optical-to-electrical conversion and filtering on the second signal at the multiple fourth bias voltages to obtain multiple second electrical signals;
• performing root mean square power detection on the multiple second electrical signals to obtain root mean square powers of the multiple second signals;
• and
• selecting a fourth bias voltage of a second signal corresponding to the smallest root mean square power from the root mean square powers of the multiple second signals, and using the selected fourth bias voltage as the second bias voltage.

A quadrature phase shift keying (QPSK) signal conjugate relationship identification apparatus, wherein the apparatus comprises:

• a QPSK modulator, configured to receive a first binary sequence signal and use the first binary sequence signal to modulate an optical signal to obtain a first signal;
• and receive a second binary sequence signal and use the second binary sequence signal to modulate the optical signal to obtain a second signal;
• and
• a processing module, configured to:
• when the QPSK modulator uses the first binary sequence signal to modulate the optical signal, determine, within a first predetermined range, a first bias voltage in the QPSK modulator, so that the first signal at the first bias voltage is a QPSK signal and a root mean square power of the first signal at the first bias voltage is the smallest, and determine a second range within the first predetermined range according to the first bias voltage;
• when the QPSK modulator uses the second binary sequence signal to modulate the optical signal, determine, within the second range, a second bias voltage in the QPSK modulator, so that a root mean square power of the second signal at the second bias voltage is the smallest;
• and determine a conjugate relationship of the QPSK signal according to a value relationship between the first bias voltage and the second bias voltage;
• wherein the processing module comprises:
• a processor, configured to control a child Mach-Zehnder (MZ) modulator of the QPSK modulator to work at a null point, and control a bias voltage of a parent MZ modulator of the QPSK modulator to change at a set adjustment step and obtain multiple third bias voltages and multiple fourth bias voltages, wherein the third bias voltages fall within the first predetermined range and the fourth bias voltages fall within the second range;
• an optical-to-electrical conversion component, configured to perform optical-to-electrical conversion on the first signal at the multiple third bias voltages to obtain multiple first electrical signals;
• and perform optical-to-electrical conversion on the second signal at the multiple fourth bias voltages to obtain multiple second electrical signals;
• and
• an analog-to-digital converter, configured to perform analog-to-digital conversion on the multiple first electrical signals and the multiple second electrical signals, wherein
• the processor is further configured to perform root mean square power detection on the multiple first electrical signals to obtain root mean square powers of the multiple first signals, wherein the multiple first electrical signals are output by the analog-to-digital converter after the analog-to-digital conversion, and select a third bias voltage of a first signal corresponding to the smallest root mean square power from the root mean square powers of the multiple first signals, and use the selected third bias voltage as the first bias voltage;
• and perform root mean square power detection on the multiple second electrical signals to obtain root mean square powers of the multiple second signals, wherein the multiple second electrical signals are output by the analog-to-digital converter after the analog-to-digital conversion, and select a fourth bias voltage of a second signal corresponding to the smallest root mean square power from the root mean square powers of the multiple second signals, and use the selected fourth bias voltage as the second bias voltage.

A dispersion compensation system, wherein the system comprises an identification apparatus and a compensation apparatus, wherein the identification apparatus comprises:

• a QPSK modulator, configured to receive a first binary sequence signal and use the first binary sequence signal to modulate an optical signal to obtain a first signal;
• and receive a second binary sequence signal and use the second binary sequence signal to modulate the optical signal to obtain a second signal;
• and
• a processing module, configured to:
• when the QPSK modulator uses the first binary sequence signal to modulate the optical signal, determine, within a first predetermined range, a first bias voltage in the QPSK modulator, so that the first signal at the first bias voltage is a QPSK signal and a root mean square power of the first signal at the first bias voltage is the smallest, and determine a second range within the first predetermined range according to the first bias voltage;
• when the QPSK modulator uses the second binary sequence signal to modulate the optical signal, determine, within the second range, a second bias voltage in the QPSK modulator, so that a root mean square power of the second signal at the second bias voltage is the smallest;
• and determine a conjugate relationship of the QPSK signal according to a value relationship between the first bias voltage and the second bias voltage;
• and
• the compensation apparatus is configured to:
• according to a conjugate relationship of a QPSK signal, which is obtained by the identification apparatus, perform optical dispersion pre-compensation coding on an electrical signal to be input into a QPSK modulator;
• wherein the processing module comprises:
• a processor, configured to control a child MZ modulator of the QPSK modulator to work at a null point, and control a bias voltage of a parent MZ modulator of the QPSK modulator to change at a set adjustment step and obtain multiple third bias voltages and multiple fourth bias voltages, wherein the third bias voltages fall within the first predetermined range and the fourth bias voltages fall within the second range;
• an optical-to-electrical conversion component, configured to perform optical-to-electrical conversion on the first signal at the multiple third bias voltages to obtain multiple first electrical signals;
• and perform optical-to-electrical conversion on the second signal at the multiple fourth bias voltages to obtain multiple second electrical signals;
• and
• an analog-to-digital converter, configured to perform analog-to-digital conversion on the multiple first electrical signals and the multiple second electrical signals, wherein
• the processor is further configured to perform root mean square power detection on the multiple first electrical signals to obtain root mean square powers of the multiple first signals, wherein the multiple first electrical signals are output by the analog-to-digital converter after the analog-to-digital conversion, and select a third bias voltage of a first signal corresponding to the smallest root mean square power from the root mean square powers of the multiple first signals, and use the selected third bias voltage as the first bias voltage;
• and perform root mean square power detection on the multiple second electrical signals to obtain root mean square powers of the multiple second signals, wherein the multiple second electrical signals are output by the analog-to-digital converter after the analog-to-digital conversion, and select a fourth bias voltage of a second signal corresponding to the smallest root mean square power from the root mean square powers of the multiple second signals, and use the selected fourth bias voltage as the second bias voltage.