US 9,438,301 B2Granted

PLL circuit, calibration method, and wireless communication apparatus

AssigneePanasonic Intellectual Property Management Co., Ltd.

InventorsYoichi Nagaso, Kenji Miyanaga, Takahiro Shima

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Abstract

In the stop state of a VCO and an injection locked frequency divider, an ILFD controller sets the control parameter of an injection locked frequency divider on the basis of the frequencies of a reference signal and the frequency-divided signal measured according to the control parameter of the injection locked frequency divider. While the injection locked frequency divider is operated and in the stop state of the VCO, the ILFD controller sets the control parameter of the injection locked frequency divider on the basis of the frequencies of the reference signal and the frequency-divided signal measured according to the control parameter of the injection locked frequency divider.

Claims12

Dependent claims

A PLL circuit comprising:

a voltage controlled oscillator that outputs a high-frequency signal;
a first injection locked frequency divider that generates a first frequency-divided signal obtained by frequency-dividing the output high-frequency signal;
a second injection locked frequency divider that generates a second frequency-divided signal obtained by frequency-dividing the first frequency-divided signal;
a frequency divider that generates a third frequency-divided signal obtained by frequency-dividing the second frequency-divided signal so as to be a frequency of a reference signal;
a phase and frequency comparator that compares the third frequency-divided signal with the reference signal and that outputs the difference between phase and frequency;
a charge pump that converts the output difference into current or voltage;
a loop filter that generates the control voltage of the voltage controlled oscillator according to the converted current or voltage and that applies the generated control voltage to the voltage controlled oscillator;
and
a calibration circuit that selects an oscillation band for determining the oscillation frequency of the voltage controlled oscillator, and that adjusts a first control parameter of the first injection locked frequency divider and a second control parameter of the second injection locked frequency divider, for operating the first injection locked frequency divider and the second injection locked frequency divider at different operation bands,
wherein after adjusting the second control parameter, the calibration circuit adjusts the first control parameter, and adjusts the oscillation band of the voltage controlled oscillator according to the third frequency-divided signal.

7 more elements

A calibration method in a PLL circuit in which a first injection locked frequency divider is connected to a second injection locked frequency divider, the calibration method comprising the steps of:

stopping operations of a voltage controlled oscillator for outputting a high-frequency signal and the first injection locked frequency divider;
measuring frequencies of a predetermined reference signal and the frequency-divided signal output from a frequency divider for frequency-dividing an output signal of the second injection locked frequency divider according to a second control parameter of the second injection locked frequency divider;
adjusting the second control parameter on the basis of the measured frequency of the frequency-divided signal;
releasing the stop of the first injection locked frequency divider;
frequency-dividing the output signal of the first injection locked frequency divider by the second injection locked frequency divider according to the first control parameter of the first injection locked frequency divider;
measuring the frequencies of the predetermined reference signal and a frequency-divided signal output from the frequency divider again, the frequency divider frequency-dividing the output signal of the second injection locked frequency divider;
adjusting the first control parameter on the basis of the frequency of the frequency divided signal output after the re-measurement;
releasing the stop of the voltage controlled oscillator;
selecting an oscillation band for determining the oscillation frequency of the voltage controlled oscillator;
and
selecting the oscillation band of the voltage controlled oscillator on the basis of the frequencies of the frequency-divided signals obtained by frequency-dividing the output signal of the voltage controlled oscillator according to the selected oscillation band by the first injection locked frequency divider, by the second injection locked frequency divider and by the frequency divider.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/409,239Filed 31 Mar 2014
Priority: JP 2013-08884919 Apr 2013
Published: US 2016/0036485 A14 Feb 2016
Granted: 6 Sep 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H04B 1/403
Circuits: using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
H03L 7/099
Details of the phase-locked loop: concerning mainly the controlled oscillator of the loop
H03L 7/183
Using a frequency divider or counter in the loop: a time difference being used for locking the loop, the counter counting between fixed numbers or…
H04L 27/20
Phase-modulated carrier systems, i.e. using phase-shift keying: modulator circuits; Transmitter circuits

Family

US 2016/0036485 A1Pre-grant publication · published 4 Feb 2016
US 9,438,301 B2This patent

From the US filing history. Foreign family members aren’t listed.

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