High efficiency gate drive circuit for power transistors

A gate drive circuit for a power transistor, comprising:

• a power transistor having a control node;
• a current control circuit operable, during turn on of the power transistor, to source a gate drive current to a control node of the power transistor and, during turn off of the power transistor, to sink a gate drive current from the control node of the power transistor;
• a first secondary current source distinct from the current control circuit and coupled directly to the control node, the first secondary current source is configured to receive a first control signal and adjust the gate drive current, during turn off of the power transistor, in accordance with the first control signal, the first control signal being indicative of a rate of change of voltage at a collector node of the power transistor;
• and
• a second secondary current source distinct from the current control circuit and coupled directly to the control node, the second secondary current source is configured to receive a second control signal and adjust the gate drive current, during turn on of the power transistor, in accordance with the second control signal, the second control signal being indicative of a rate of change of current passing through the power transistor.

A gate drive circuit for a power transistor, comprising:

• a power transistor having a control node;
• a current control circuit operable, during turn on of the power transistor, to source a gate drive current to a control node of the power transistor and, during turn off of the power transistor, to sink a gate drive current from the control node of the power transistor;
• a first secondary current source distinct from the current control circuit and coupled directly to the control node, the first secondary current source is operable, during turn off of the power transistor, to adjust the gate drive current before a gate voltage of the power transistor reaches a steady state condition and is nonoperable, during turn off of the power transistor, after the gate voltage reaches a steady state condition;
• and
• a second secondary current source distinct from the current control circuit and coupled directly to the control node, the second secondary current source is operable, during turn on of the power transistor, to adjust the gate drive current before the gate voltage reaches a steady state condition and is nonoperable, during turn on of the power transistor, after the gate voltage reaches a steady state condition.

A gate drive circuit for a power transistor, comprising:

• a power transistor having a control node;
• a first voltage controlled current source coupled directly to the control node and configured, during turn off of the power transistor, to sink a gate drive current from the control node of the power transistor and operable, during turn off of the power transistor, to adjust the gate drive current before a gate voltage of the power transistor reaches a steady state condition, where the first voltage controlled current source configured is nonoperable, during turn off of the power transistor, after the gate voltage reaches a steady state condition;
• and
• a second voltage controlled current source coupled directly to the control node and configured, during turn on of the power transistor, to source a gate drive current to a control node of the power transistor and operable, during turn on of the power transistor, to adjust the gate drive current before the gate voltage reaches a steady state condition, where the second voltage controller current source is nonoperable, during turn on of the power transistor, after the gate voltage reaches a steady state condition.

A gate drive circuit for a power transistor, comprising:

• a power transistor having a control node;
• a first voltage source coupled to the control node and operable, during turn off of the power transistor, to sink a gate drive current from the control node of the power transistor;
• a second voltage source coupled to the control node and operable, during turn on of the power transistor, to source a gate drive current to the control node of the power transistor;
• a first secondary current source coupled to the control node and operable, during turn off of the power transistor, to adjust the gate drive current before a gate voltage of the power transistor reaches a steady state condition and is nonoperable, during turn off of the power transistor, after the gate voltage reaches a steady state condition;
• and
• a second secondary current source coupled to the control node and operable, during turn on of the power transistor, to adjust the gate drive current before the gate voltage reaches a steady state condition and is nonoperable, during turn on of the power transistor, after the gate voltage reaches a steady state condition.